MK5811A
Low EMI Clock Generator
Description
The MK5811A device generates a low EMI output clock from a clock or crystal input. The device is designed to dither a high emissions clock to lower EMI in consumer applications. Using ICS’ proprietary mix of analog and digital Phase Locked Loop (PLL) technology, the device spreads the frequency spectrum of the output and reduces the frequency amplitude peaks by several dB. The MK5811A offers both centered and down spread from a high-speed clock input.
For different multiplier configurations, use the MK5812 (2x) or MK5814 (4x).
ICS offers many other clocks for computers and
computer peripherals. Consult ICS when you need to remove crystals and oscillators from your board.
Features
••••••••••••••
Packaged in 8-pin SOIC
Available in Pb (lead) free packageProvides a spread spectrum output clockSupports flat panel controllers
Accepts a clock or crystal input (provides same frequency dithered output)
Input frequency range of 4 to 32 MHzOutput frequency range of 4 to 32 MHz1X frequency multiplicationCenter and down spread
Peak reduction by 8 dB to 16 dB typical on 3rd through 19th odd harmonicsLow EMI feature can be disabledIncludes power downOperating voltage of 3.3 V
Advanced, low-power CMOS process
Block Diagram
VDDS1:0Spread DirectionFRSEL2X1/CLKClock Buffer/CrystalOcsillatorX2PLL ClockSynthesisand SpreadSpectrumCircuitrySSCLKThe crystal requires external capacitors foraccurate tuning of the clockGNDMDS 5811A A1Revision 091205
Integrated Circuit Systems, Inc. z 525 Race Street, San Jose, CA 95126 z tel (408) 297-1201 z www.icst.com
元器件交易网www.cecb2b.com
MK5811A
Low EMI Clock Generator
Pin Assignment
Spread Direction and Spread Percentage
8765X2VDDFRSELSSCLKS1Pin 3000MMM111
S0 Pin 40M10M10M1
Spread Direction
Spread Percentage
X1/ICLKGNDS1S012348-pin (150 mil) SOICCenter±1.4Center±1.1Center±0.6Center±0.5NoSpread-Down -1.6Down-2.0Down-0.7Down-3.0
0 = connect to GND
M = unconnected (floating)1 = connect directly to VDD
Frequency Selection
ProductMK5811
FRSEL(pin 6)01M
MK58121
01M
MK58141
01M
InputFreq. Range4.0 to 8.0 MHz8.0 to 16.0MHz16.0 to 32.0MHz4.0 to 8.0 MHz8.0 to 16.0MHz16.0 to 32.0MHz4.0 to 8.0 MHz8.0 to 16.0MHz16.0 to 32.0MHz
Multiplier
X1X1X1X2X2X2X4X4X4
OutputFreq. Range4.0 to 8.0 MHz8.0 to 16.0MHz16.0 to 32.0MHz8.0 to 16.0MHz16.0 to 32.0MHz32.0 to 64.0MHz16.0 to 32.0MHz32.0 to 64.0MHz64.0 to 128MHz
0 = connect to GND
M = unconnected (floating)1 = connect directly to VDD
Note 1: The information in this datasheet does not apply to the MK5812 and MK5814 as each have independent datasheets available at www.icst.com.
MDS 5811A A2Revision 091205
Integrated Circuit Systems, Inc. z 525 Race Street, San Jose, CA 95126 z tel (408) 297-1201 z www.icst.com
元器件交易网www.cecb2b.com
MK5811A
Low EMI Clock Generator
Pin Descriptions
PinNumber
PinName
Pin Type
Pin Description
12345678
X1/ICLKGNDS1S0SSCLKFRSELVDDX2
InputPowerInputInputOutputInputPowerXO
Connect to 4-32 MHz crystal or clock.Connect to ground.
Function select 1 input. Selects spread amount and direction per table above. (default-internal mid-level).
Function select 0 input. Selects spread amount and direction per table above. (default-internal mid-level).Clock output with Spread spectrum
Function select for input frequency range. Default to mid level “M”.Connect to +3.3 V.
Crystal connection to 4-32 MHz crystal. Leave unconnected for clock
External Components
The MK5811A requires a minimum number of external components for proper operation.
PCB Layout Recommendations
For optimum device performance and lowest output phase noise, observe the following guidelines: 1) Mount the 0.01µF decoupling capacitor on the component side of the board as close to the VDD pin as possible. No vias should be used between the decoupling capacitor and VDD pin. The PCB trace to the VDD pin and the PCB trace to the ground via should be kept as short as possible.
2) To minimize EMI, place the 20Ω series-termination resistor (if needed) close to the clock output.
3) An optimum layout is one with all components on the same side of the board, thus minimizing vias through other signal layers. Other signal traces should be routed away from the MK5811A device. This includes signal traces located underneath the device, or on layers adjacent to the ground plane layer used by the device.
Decoupling Capacitor
A decoupling capacitor of 0.01µF must be connected between VDD and GND on pins 7 and 2. Connect the capacitor as close to these pins as possible. For optimum device performance, mount the decoupling capacitor on the component side of the PCB. Avoid the use of vias in the decoupling circuit.
Series Termination Resistor
Use series termination when the PCB trace between the clock output and the load is over 1 inch. To series terminate a 50Ω trace (a commonly used trace impedance), place a 20Ω resistor in series with the clock line. Place the resistor as close to the clock
output pin as possible. The nominal impedance of the clock output is 30Ω.
Crystal Information
The crystal used should be a fundamental mode (do not use third overtone), parallel resonant crystal. To optimize the initial accuracy, connect crystal capacitors from pins X1 to ground and X2 to ground. The value of these capacitors is given by the following equation:
Crystal caps (pF) = (CL - 6) x 2
Tri-level Select Pin Operation
The S1 and S0 select pins are tri-level, meaning that they have three separate states to make the selections shown in the table on page 2. To select the M (mid) level, the connection to these pins must be eliminated by either floating them originally, or tri-stating the GPIO pins which drive the select pins.
MDS 5811A A3Revision 091205
Integrated Circuit Systems, Inc. z 525 Race Street, San Jose, CA 95126 z tel (408) 297-1201 z www.icst.com
元器件交易网www.cecb2b.com
MK5811A
Low EMI Clock Generator
In the equation, CL is the crystal load capacitance. For example, a crystal with a 16 pF load capacitance uses two 20 pF [(16-6) x 2] capacitors.
Modulation RateSpread Spectrum Profile
The MK5811A is a low EMI clock generator using a
optimized frequency slew rate algorithm to facilitate down stream tracking of zero delay buffers and other PLL devices.
FrequencyTimeAbsolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the MK5811A. These ratings, which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of the device, at these or any other conditions, above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical parameters are guaranteed only over the recommended operating temperature range.
Item
Supply Voltage, VDDAll Inputs and Outputs
Ambient Operating TemperatureStorage TemperatureJunction TemperatureSoldering Temperature
7 V
Rating
-0.5 V to VDD+0.5 V0 to +85°C-65 to +150°C125°C260°C
Recommended Operation Conditions
Parameter
Ambient Operating Temperature
Power Supply Voltage (measured in respect to GND)
Min.
0+3.0
Typ.Max.
+853.63
Units
°CV
MDS 5811A A4Revision 091205
Integrated Circuit Systems, Inc. z 525 Race Street, San Jose, CA 95126 z tel (408) 297-1201 z www.icst.com
元器件交易网www.cecb2b.com
MK5811A
Low EMI Clock Generator
DC Electrical Characteristics
Unless stated otherwise, VDD = 3.3 V ±10%, Ambient Temperature 0 to +85°C
Parameter
Operating VoltageSupply Current
Symbol
VDDIDD
Conditions
No load, at 3.3 V, Fin=12 MHzNo load, at 3.3 V, Fin=24 MHzNo load, at 3.3 V, Fin=32 MHz
Min.
3.0
Typ.
3.323
Max.
3.63253035
Units
VmAmAmAVVVVV
Input High VoltageInput middle VoltageInput Low VoltageOutput High VoltageOutput High VoltageOutput Low VoltageInput CapacitanceNominal Output Impedance
VIHVIHMVILVOHVOHVOLCIN1CIN2ZO
CMOS, IOH = 12 mAIOH = 24 mAIOL = -12 mAIOL = -24 mAS0, S1, FRSEL pinsX1, X2 pins
0.85VDD0.4VDD0.02.42.0
VDD0.5VDD0.0
VDD0.6VDD0.15VDD
0.41.2
4630
69
VVpFpFΩ
AC Electrical Characteristics
Unless stated otherwise, VDD = 3.3 V ±10%, Ambient Temperature 0 to +85° C, CL = 15 pF
Parameter
Input Clock FrequencyOutput Clock FrequencyInput Clock Duty CycleOutput Clock Duty CycleCycle-to-cycle Jitter1Cycle-to-cycle Jitter1Output Rise TimeOutput Fall Time
EMI Peak Frequency ReductionNote 1: Spread is enabled.
SymbolConditionsMin.
44
Typ.Max.Units
323260
MHzMHz%%pspsnsnsdB
Time above VDD/2Time above 1.5 VFin=4MHz, Fout=4 MHzFin=8MHz, Fout=8 MHz
tRtF
0.4 to 2.4 V2.4 to 0.4 V
4045
503502501.21.28 to 16
55800450
MDS 5811A A5Revision 091205
Integrated Circuit Systems, Inc. z 525 Race Street, San Jose, CA 95126 z tel (408) 297-1201 z www.icst.com
元器件交易网www.cecb2b.com
MK5811A
Low EMI Clock Generator
Package Outline and Package Dimensions (8-pin SOIC, 150 Mil. Body)
Package dimensions are kept current with JEDEC Publication No. 95
8MillimetersSymbolMinMaxInchesMinMaxEINDEXAREAH1 2DAA1BCDEeHhLα1.351.750.100.250.330.510.190.254.805.003.804.001.27 BASIC5.806.200.250.500.401.270°8°.0532.0688.0040.0098.013.020.0075.0098.1890.1968.1497.15740.050 BASIC.2284.2440.010.020.016.0500°8°AA1h x 45C- C -eBSEATINGPLANE.10 (.004) CLThermal Characteristics for 8-pin SOIC
Parameter
Thermal Resistance Junction to Ambient
Thermal Resistance Junction to Case
Symbol
θJAθJAθJAθJC
Conditions
Still air1 m/s air flow3 m/s air flow
Min.Typ.
15014012040
Max.Units
°C/W°C/W°C/W°C/W
MDS 5811A A6Revision 091205
Integrated Circuit Systems, Inc. z 525 Race Street, San Jose, CA 95126 z tel (408) 297-1201 z www.icst.com
元器件交易网www.cecb2b.com
MK5811A
Low EMI Clock Generator
Ordering Information
Part / Order Number
MK5811ASMK5811ASTRMK5811ASLFMK5811ASLFTR
Marking
5811AS5811AS5811ASL5811ASL
Shipping Packaging
TubesTape and Reel
TubesTape and Reel
Package
8-pin SOIC8-pin SOIC8-pin SOIC8-pin SOIC
Temperature
0 to +85° C0 to +85° C0 to +85° C0 to +85° C
Parts that are ordered with a \"LF\" suffix to the part number are the Pb-Free configuration and are RoHS compliant.
While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems, Inc. (ICS) assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments.
MDS 5811A A7Revision 091205
Integrated Circuit Systems, Inc. z 525 Race Street, San Jose, CA 95126 z tel (408) 297-1201 z www.icst.com
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