Typ. 16V
SPEC. NUMBERS864-1470(3/3)SPEC TITLE
6.0. SIGNAL TIMING SPECIFICATIONS
6.1TimingspecificationatHVMode(LVDSTransmitterInput)6.1 Timing specification at HV Mode (LVDS Transmitter Input
Item
Frame RateFrame PeriodVertical Display TimeVertical Blanking Time1 Line Scanning TimeHorizontal Display TimeHorizontal Blanking TimeClock Rate
Symbol
-T1T2T3T4T5T61/T7
Min.40624--1200--40.8
Typ.60635600351344102432051.2
Max.73750--1400--63
UnitHzLinesLinesLinesClocksClocksClocksMHz
70SIGNALTIMINGWAVEFORMS7.0 SIGNAL TIMING WAVEFORMS
7.1 Vertical Input Timing Waveforms of Interface Signal
T1
VSD
T3HSDDEN
T2……
……
…
7.2 Horizontal Input Timing Waveforms of Interface Signal
T4
HSD
T6T7DCLKDEN
T5
……
……
SPEC. NUMBERS864-1470(3/3)SPEC TITLE
HV070WS1-105 Product Specification
PAGE16OF 34A4(210 X 297) PRODUCT GROUPTFT LCD PRODUCT
7.3 LVDS Rx Interface Timing Parameter
ThespecificationoftheLVDSRxinterfacetimingparameterThe specification of the LVDS Rx interface timing parameter
REVO
ISSUE DATE2012.06.25
< Table 9, LVDS Rx Interface Timing Specification>
ItemCLKIN PeriodInputData0Input Data 0Input Data 1Input Data 2Input Data 3Input Data 4Input Data 5Input Data 6
SymboltRCIPtRIP0tRIP1tRIP2tRIP3tRIP4tRIP5tRIP6
Min.--00.44tRICP/7-0.4
Typ.19.53000.0tRICP/7
Max.-+04+0.4tRICP/7+0.4
UnitRemarksnsecnsecnsec
2 ×tRICP/7-0.42 ×tRICP/72 ×tRICP/7+0.4nsec3 ×tRICP/7-0.43 ×tRICP/73 ×tRICP/7+0.4nsec4 ×tRICP/7-0.44 ×tRICP/74 ×tRICP/7+0.4nsec5 ×tRICP/7-0.45 ×tRICP/75 ×tRICP/7+0.4nsec6 ×tRICP/7-0.46 ×tRICP/76 ×tRICP/7+0.4nsec
tRIP6tRIP5tRIP4tRIP3tRIP2tRIP1
tRIP0
RxINz +/-* Z = 0, 1, 2 RxCLKIN+/-Rx
Rx
Rx
Rx
Rx
Rx
Rx
Rx
Rx
Rx
Rx
Vdiff=0[v]tRCIP
Vdiff=0[v]SPEC. NUMBERS864-1470(3/3)SPEC TITLE
HV070WS1-105 Product Specification
PAGE17OF 34A4(210 X 297) PRODUCT GROUPTFT LCD PRODUCT
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ISSUE DATE2012.06.25
8.0 INPUT SIGNALS, BASIC DISPLAY COLORS & GRAY SCALE OF
COLORS
A total of 16.7M colors are displayed with dither & HFRC using 64 gray from 8bit input.
Colors & Gray Scale
BlackBlueGreen
Basic BiColors
LightBlueLight BlueRedPurpleYellowWhiteBlack△Darker
Gray Scale GrayScale
of Red
△▽Brighter▽RedBlack△Darker
Gray Scale of Green
△▽Brighter▽GreenBlack△Darker
Gray Scale ofBlueof Blue
△▽Brighter▽Blue
Black△
Gray Scale
of White & Black
Darker△▽Brighter▽White
1
1
1
1
1
0
1
1↓1
1
1
1
1
1
1
1
000010
000001
000000
000000↓↓1
1
1
1
1
0
1
1↓1
1
1
1
1
1
1
1
000000
000000
000000
000000↓↓000000
000000
000000
000000
000010
000001
000000
000000↓↓1
1
1
1
1
0
1
1↓1
1
1
1
1000
1000
1000
1000↓↓000000
000000
000000
000000
1000
1000
1000
1000↓↓000000
000000
000000
000000
1010
1001
1000
1000↓↓1
1
1
1
1
0
1
1↓1000
1000
1000
1000
1
0
1
1↓1000
1000
1000
1000
1
0
1
1↓1000
1000
1000
1000
00001111010
00001111001
00001111000
Red data
00001111000↓↓1
1
1
1
000010
000001
00001111000
00001111000
00001111000
00001111000
00110011000
00110011000
Data signalGreen data
00110011000
00110011000↓↓
000000
000000↓↓1
1
1
1
000010
000001
000000
000000
000000
000000
000000
000000
000000
000000
00110011000
00110011000
00110011000
00110011000
01010101000
01010101000
01010101000
Blue data
01010101000↓↓000000↓↓000000↓↓1
1
1
1
000000
000000
000000
000000
000000
000000
000000
000000
01010101000
01010101000
01010101000
01010101000
R0R1R2R3R4R5R6R7G0G1G2G3G4G5G6G7B0B1B2B3B4B5B6B7
SPEC. NUMBERS864-1470(3/3)SPEC TITLE
HV070WS1-105 Product Specification
PAGE18OF 34A4(210 X 297) PRODUCT GROUPTFT LCD PRODUCT
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ISSUE DATE2012.06.25
9.0 3-WIRE SERIAL PORT INTERFACE (SPI INTERFACE)
Thismoduleuse3wireserialportinterfaceasfunctionconfigurationandparametersettingThis module use 3-wire serial port interface as function configuration and parameter setting9.1 3-Wire command format
Address[5:0]
W/RHi-Z
Data[7:0]
Delay
Next Transfer
CSBSDASCL
D15
D14D13D12
D11D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
D15
D14
BitD15-D10D9D9D7-D0
Description
Register Address [5:0]
W/R control bit. “0” for Write; “1” for Read
Hi-z bit during read mode. Any data within this bits will be ignored during write ModeData for the W/R operation to the address indicated by Address phase
9.2 3-Wire Write format
MSB
D15
D14
D13
D12
D11
D10
D90
D8X
D7
D6
D5
D4
D3
D2
D1
Register Address [5:0]
Data (Issued by external controller)
LSB
D1
9.3 3-Wire Read format
MSB
D15
D14
D13
D12
D11
D10
D91
D8
Hi-Z
LSB
D2
D1
D1
D7D6D5D4D3
Register Address [5:0]Data (Issued by 3-wire engine)
SPEC. NUMBERS864-1470(3/3)SPEC TITLE
HV070WS1-105 Product Specification
PAGE19OF 34A4(210 X 297) PRODUCT GROUPTFT LCD PRODUCT
9.4 3-wire control register
9.4.1 R00 : System Control Register
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ISSUE DATE2012.06.25
DesignationMODE
AddressR0[0]
Description
DE/SYNC mode select.
MODE = “0”, HSD/VSD mode.MODE = “1”, DE mode. (Default)
DCLK polarity control bit
DCLKPOL = “0” : Data sampling at DCLK falling edge. (Default)DCLKPOL = “1” : Data sampling at DCLK rising edge.Global reset bit.
GRB=“0”, The controller is in reset state.GRB=“1”, Normal operation. (Default)
Standby mode selection bit.Standbymodeselectionbit
STBYB = “0”, Timing control, driver and DC-DC converter, are off,and all outputs are High-Z.
STBYB = “1”, Normal operation. (Default)
Gate Up or Down scan control.
UPDN = “0”, STV2 output vertical start pulse and UD pin outputLogical “0” to Gate driver. (Default)
ppppUPDN = “1”, STV1 output vertical start pulse and UD pin output
Logical “1” to Gate driver. (Default)
Right/Left sequence control of source driver.
SHLR = “0”, Shift left : Last data = S1<-S2<-S3…<-S960 = First DataSHLR = “1”, Shift left : Last data = S1->S2->S3…->S960 = Last Data(Default)Reserved
POWER enable.
PWR_EN = H, enable PWM, Charge pump and VCOM buffer.
DCKPOLR0[1]
GRBR0[2]
STBYBR0[3]
UPDNR0[4]
SHLRR0[5]
-PWR_EN
R0[6]R0[7]
SPEC. NUMBERS864-1470(3/3)SPEC TITLE
HV070WS1-105 Product Specification
PAGE20OF 34A4(210 X 297) PRODUCT GROUPTFT LCD PRODUCT
9.4.2 R01 : System Control Register
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ISSUE DATE2012.06.25
DesignationAddressR1[0]
DescriptionReserved
Display resolution selection.
RES[1:0] = “01”, for 1024(RGB)*768 display resolution.(dual or cascade)
RES[1:0] = “00”, for 1024(RGB)*600 display resolution.(dualorcascade)(Default)(dual or cascade) (Default)
RES[1:0] = “10”, for 800(RGB)*600 display resolution.(dual or cascade)
RES[1:0] = “11”, for 800(RGB)*480 display resolution.(dual or cascade) (601~936 channel disable)Normal Operation / BIST pattern select.BIST = H : BIST (DCLK input is not needed)BIST = L : Normal Operation (Default)
Dithering function enable control.
DITHER = “1”, Enable internal dithering function.
DITHER = “0”, Disable internal dithering function. (Default)H-FRC selection
HFRC = H : H-FRC enable
HFRC = L : H-FRC disable (Default)
If DITHER = H and HFRC = L : enable only FRC/dithering functionIfDITHERLdisableditheringfunctionIf DITHER = L, disable dithering function (H-FRC and FRC both disable)
CABC H/W enable pin. Normally pull low.
When CABC_EN = “00”, CABC OFF. (Default mode)When CABC_EN = “01”, User interface Image.When CABC_EN = “10”, Still Picture.When CABC_EN = “11”, Moving Image.
RES[1:0]R1[2:1]
BISTR1[3]
DITHERR1[4]
HFRCR1[5]
CABC_EN[1:0]R1[7:6]
9.4.3 R02 : System Control Register
DesignationAddressR2[5:0]
DescriptionReserved
Normally black or normally white setting.NBW = H : Normally blackNBWLNNBW = L : Normally white (Default)llhit(Dflt)Reserved
NBWBIST
R2[6]R2[7]
SPEC. NUMBER
S864-1470(3/3)SPEC TITLE
HV070WS1-105 Product Specification
PAGE21OF 34A4(210 X 297) PRODUCT GROUPTFT LCD PRODUCT
9.4.4 R03 : Gate on sequence controller register
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ISSUE DATE2012.06.25
DesignationAddressDescription
Gate on sequence select
SEL[0]1
SEL[1]1
Pin control function
SEL[1:0]R3[1:0]
10
00
Frame-R3[2]R3[7:3]
10
Z (Default)
Frame inverse or not select.FRAME = “1”, Uniform
FRAME = “0”, Frame inverse (Default)Reserved
9.4.5 R0E : test mode (1)
DesignationTEST_mode(1)
AddressR0E[7:0]
Description
Enter test mode (1)
TEST_mode = 8’h5F, enter
TEST_mode = other exit (Default)
9.4.6 R0F : test mode (2)
DesignationTEST_mode(2)
AddressR0F[7:0]
Description
Enter test mode (2)
TEST_mode = 8’hA4, enter
TEST_mode = other exit (Default)
SPEC. NUMBERS864-1470(3/3)SPEC TITLE
HV070WS1-105 Product Specification
PAGE22OF 34A4(210 X 297) PRODUCT GROUPTFT LCD PRODUCT
9.4.7 R0D : charging time control (3)
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ISSUE DATE2012.06.25
DesignationOE_WIDTH
AddressR0D[7:0]
Description
Inversion type select. Enter Test mode (1) and (2) first.Then R0D setting will be active
TEST_mode = 8’h00, increase charge time
948R02:chargesharingcontrol9.4.8 R02 : charge sharing control
DesignationEQC_ADJ
AddressR02[7:0]
Description
Inversion type select. Enter Test mode (1) and (2) first.
Then R10 setting will be active
EQC_ADJ = 8’h43, adjust charge sharing time
9.4.9 R0A : BIAS current control (5)
DesignationBIAS_TRIG
AddressR0A[7:0]
Description
Inversion type select. Enter Test mode (1) and (2) first.Then R10 setting will be active
BIAS_TRIG = 8’h28, trigger bias reduction
9.4.10 R10 : inversion architecture
DesignationAddressDescription
Inversion type select. Enter Test mode (1) and (2) first.Then R10 setting will be active2line / 1dot = 8’h41
1line / 1dot = 8’h01 (Default)
INVR10F[7:0]
SPEC. NUMBERS864-1470(3/3)SPEC TITLE
HV070WS1-105 Product Specification
PAGE23OF 34A4(210 X 297) PRODUCT GROUPTFT LCD PRODUCT
9.4.11 R38 : PWM_DIV setting
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ISSUE DATE2012.06.25
DesignationAddressDescription
PWM Dimmer frequency step settingR38[7:0]0x0C0x1C0x2C0x3C0x4C0x5C0x6C0x7C
PWM_DIV[3:0]
000001010011100101110111
Register functionDon’t use.
1234567 (Default)
Real PWM Frequency of DIMO
FOSC
PWM Frequency = 256 x 128 x PWM_DIV[2:0]
PWM_DIV[3:0]R38[7:0]
PWM ReferenceFrequency (FOSC)51.2MHz (Typical)
In order in maintain the dimming frequency for brightness control
at different display resolution (typical 1024 x 600) at normal mode. We will change default value of PWM_DIV to follow as tableDisplay ResolutionRES[1:0] = “00”[]RES[1:0] = “01”RES[1:0] = “10”RES[1:0] = “11”
Default value of PWM_DIV
111111110100
Note : The R6 and R38 register will be available when the R0E and R0F register already had issued.
SPEC. NUMBER
S864-1470(3/3)SPEC TITLE
HV070WS1-105 Product Specification
PAGE24OF 34A4(210 X 297) PRODUCT GROUPTFT LCD PRODUCT
9.5 Recommend Register Setting (CABC Off mode)
REVO
ISSUE DATE2012.06.25
Register write sequence : R00 (Reset)ÆR00 (Into Standby mode) ÆR01 (Enable FRC / Dither, CABC off) ÆR02 (Enable Normally Black) ÆR0E (Enter Test mode (1)) ÆR0F (Enter Test mode (2))ÆR0D (SDRRS on) ÆR00 (Release standby mode)
If you don’t use register write sequence, it may cause faulty operation.
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
Setting0x00290x00250x04300x08400x385F0x3CA40X4041000x34010x002D
Remark
R00R00R01R02R0ER0FR10R0DR00
000000000
000000100
000011010
000011010
000111000
001001010
000000000
000000000
000001000
000110100
111001001
001010000
100010001
010011001
000010000
110010111
2dot inv.dot
9.6 Recommend Register Setting (CABC on mode (Moving Picture)
Register write sequence : R00 (Reset)ÆR00 (Into Standby mode) ÆR01 (Enable FRC / Dither, CABC on) Æ
R02 (Enable Normally Black) ÆR0E (Enter Test mode (1)) ÆR0F (Enter Test mode (2)) ÆR0D (SDRRS on)ÆR38 (PWM Frequency = 1.5KHz) R38 (PWM Frequency 1.5KHz) ÆR00 (Release standby mode)If you don’t use register write sequence, it may cause faulty operation.
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
Setting0x00290x00250x04F00x08400x385F0x3CA40X40410x34010E01C0xE01C0x002D
Remark
R00R00R01R02R0ER0FR10R0DR38R00
0000000010
0000001010
0000110110
0000110100
0001110000
0010010100
0000000000
0000000000
0000010000
0001101000
1110010001
0010100010
1000100011
0100110011
0000100000
1100101101
2dot inv.
SPEC. NUMBERS864-1470(3/3)SPEC TITLE
HV070WS1-105 Product Specification
PAGE25OF 34A4(210 X 297) PRODUCT GROUPTFT LCD PRODUCT
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ISSUE DATE2012.06.25
10.0 POWER SEQUENCE
To prevent a latch-up or DC operation of the LCD module, the power on/off sequence shallppp,pqbe as shown in below
90%
Power Supply for LCD
VCC
90%
10%
0V
10%
T1
T2ValidData
T5T7T6
Interface Signal
Vi
0V
(LVDS Signal of Transmitter)Initial 3-Wire Command
T3
LEDPower
T4
LEDON
OFF
OFF
Parameter
T1T2T3T4T5T6T7
Value
Min.0.5020020003400
Typ.
Max.1016
Unitmsmsmsmsmsmsms
Remark
Notes : 1. When the power supply VDD is 0V, Keep the level of input signals on the low or keep
high impedance.
2Donotkeeptheinterfacesignalhighimpedancewhenpowerison2. Do not keep the interface signal high impedance when power is on.
3. Back Light must be turn on after power for logic and interface signal are valid.SPEC. NUMBERS864-1470(3/3)SPEC TITLE
HV070WS1-105 Product Specification
PAGE26OF 34A4(210 X 297) PRODUCT GROUPTFT LCD PRODUCT
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ISSUE DATE2012.06.25
11.0 MECHANICAL CHARACTERISTICS
11.1 Dimensional Requirements111DiilRit
Figure 5 & 6 (located in 12.0) shows mechanical outlines for the model
Parameter
Active AreaNbNumber of pixelsfilPixel pitchPixel arrangementDisplay colorsDisplay modeOutlinedimensionOutline dimensionWeight Back-light
Specification
153.60(H) X 90.00(V)
1024(H)X600(V)(1ilRGBdt)1024(H) X 600(V) (1 pixel = R + G + B dots)0.15(H) X 0.15(V)RGB Vertical stripe16.7MNormally Black
1636±0.3(H)163.603(H)×102.91029±0.3(V)03(V)×2.47247±0.2(D)02(D)95 (Max.)
Edge side 20-LEDs type ( 5 X 4 Array)
mmgUnitmm
11.2 Polarizer Hardness.
The surface of the LCD has an coating to reduce scratching.
11.3 Light Leakage
There shall not be visible light from the back-lighting system around the edges of the screen as seen from a distance 50cm from the screen with an overhead light level of
150lux. The manufacture shall furnish limit samples of the panel showing the light leakage acceptable.
SPEC. NUMBERS864-1470(3/3)SPEC TITLE
HV070WS1-105 Product Specification
PAGE27OF 34A4(210 X 297) PRODUCT GROUPTFT LCD PRODUCTREVOISSUE DATE2012.06.2512.0 MECHANICAL DRAWINGFigure5.TFT-LCDFigure 5. TFTLCD Module Outline Dimension (Front View)ModuleOutlineDimension(FrontView)SPEC. NUMBERS864-1470(3/3)SPEC TITLEHV070WS1-105 Product Specification PAGE28OF 34A4(210 X 297) PRODUCT GROUPTFT LCD PRODUCT
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ISSUE DATE2012.06.25
Figure 6. TFT-LCD Module Outline Dimensions (Rear view)
SPEC. NUMBERS864-1470(3/3)SPEC TITLE
HV070WS1-105 Product Specification
PAGE29OF 34A4(210 X 297) PRODUCT GROUPTFT LCD PRODUCT
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ISSUE DATE2012.06.25
13.0 RELIABLITY TEST
TheReliabilitytestitemsanditsconditionsareshowninbelowThe Reliability test items and its conditions are shown in below.
No
Test Item
Temperature and Humidity test
(Operation)
Temperature and Humidity Cycling(Storage)Thermal shock
Low temperature storage testLow Temperature Test (Operation)BiasedHumidity/HeatSoak Test(Storage)Altitude storageHot Start TestCold Start TestMechanicalshockMechanical shock
Mechanical Random vibration4 Pt Bend TestRing on Ring TestESD
1. Ta = 40℃/90% 24hr
2. Ta = 40℃/30% 24hr3. Ta = 0℃24hr
Ta = 85℃/90%RH (2H) ,-20℃(2H),Waypoint(25℃25% RH turn off Humidity control) 12cycle. 144HrTa = -40 °C ↔85 °C
(30min residence), 100 cycleTa = -40 °C, 300 hrsTa = -20 °C, 300hrsTa = 85 °C/85%, 300hr20000 ft/-40 °C, 24hr
Ta = 85 °C 1hr, power on/off per 5m, 5 timeTa = -40°C 1hr, power on/off per 5m, 5 time
100 G, 6 ms, half sine wave(±X,±Y,±Z). Acceleration measured shock table.
3.5 Grms, PSD =0.025g2/Hz, 5-500 Hz15 minutes in all axes (X, Y, Z)
1. 7 kgf deflection. Scribed edge side up2. 4 kgf deflection. Scribed edge side downX kgf applied. Load rae:75mm/min
Screen: 150 pF, 330 Ohm, +/-15kV air, +/-8 kV contact. FPC: 100 pFm100 Ohm, +/-200V10 points, 20times/ptPage flip script, 2 m flips
Conditions
1
234567891011121314
15Functional Test
Notes :
1Exceptformovertheconditionsofthepolarizerspecifications1. Except form over the conditions of the polarizer specifications.2. ESD test condition is standard of customer system.SPEC. NUMBERS864-1470(3/3)SPEC TITLE
HV070WS1-105 Product Specification
PAGE30OF 34A4(210 X 297) PRODUCT GROUPTFT LCD PRODUCT
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ISSUE DATE2012.06.25
14.0 HANDLING & CAUTIONS
14.1 Cautions when taking out the module141Cautionswhentakingoutthemodule
yPick the pouch only, when taking out module from a shipping package.14.2 Cautions for handling the module
yAs the electrostatic discharges may break the LCD module, handle the LCD module withcare. Peel a protection sheet off from the LCD panel surface as slowly as possible.
yAs the LCD panel and back -light element are made from fragile glass (epoxy) material,impulse and pressure to the LCD module should be avoided.
yAs the surface of the polarizer is very soft and easily scratched, use a soft dryAthffthliiftdilthdftdclothlthwithout chemicals for cleaning.
yDo not pull the interface connector in or out while the LCD module is operating.yPut the module display side down on a flat horizontal plane.yHandle connectors and cables with care.14.3 Cautions for the operation
yWhen the module is operating, do not lose MCLK, DE signals. If any one of these signalswere lost, the LCD panel would be damaged.
yObey the supply voltage sequence. If wrong sequence is applied, the modulewould bedamaged.
14.4 Cautions for the atmosphere
yDew drop atmosphere should be avoided.
yDo not store and/or operate the LCD module in a high temperature and/or humidity
pgpypgpyatmosphere. Storage in an electro-conductive polymer packing pouch and under relativelylow temperature atmosphere is recommended.14.5 Cautions for the module characteristics
yDo not apply fixed pattern data signal to the LCD module at product aging. yApplying fixed pattern for a long time may cause image sticking.14.6 Cautions for the digitizer assembly
yWhen assembling FPC connector, do not flip connector past 90°due to possible damage toconnectorto connector.
yWhen positioning digitizer underneath driver IC, do not lift driver IC past 90°due to possible damage to drive IC pattern.
yPlease be warned that during assembly of digitizer, the opening or closing of FPC will result in possible electrostatic discharge damage to the LED14.7 Other cautions
yDo not re-adjust variable resistor or switch etc.
yWhen returning the module for repair or etc., Please pack the module not to be broken.WhenreturningthemoduleforrepairoretcPleasepackthemodulenottobebrokenWe recommend to use the original shipping packages.SPEC. NUMBERS864-1470(3/3)SPEC TITLE
HV070WS1-105 Product Specification
PAGE31OF 34A4(210 X 297) PRODUCT GROUPTFT LCD PRODUCT
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ISSUE DATE2012.06.25
15.0 LABELS
15.1 Product Label
HV070WS1-105
Customer BarcodeVVV
P
P
P
P
P
P
P
P
P
P
P
YY
WW
ZZZZ
0103Vd01~03 : Vendor coded04~14 : QPN
15~16 : Manufactured year
1718M17~18 : Manufactured weekftdk
19~22 : Serial number (32 digit/alphabet)
HYDIS Barcode1
2
3
4
5
6
7
XXXXXXXXXXXXXXXXX
No 1. Control NumberNo 2. Rank / Grade
No 3. Line Classification
(Hydis:HTOC:TIDS:C)(Hydis: H, TOC: T, IDS: C)No 4. Year (5 : 2005, 6 : 2006, …)
No 5. Month (1, 2, 3,…, 9, X, Y, Z)No 6. FG CodeNo 7. Serial Number
SPEC. NUMBER
S864-1470(3/3)SPEC TITLE
HV070WS1-105 Product Specification
PAGE32OF 34A4(210 X 297) PRODUCT GROUPTFT LCD PRODUCT
15.2 Packing Label
Label Size: 108 mm (L) ×56 mm (W) Contents
Model: HV070WS1-105
Q`ty: Module Q`ty in one box
Serial No.: Box Serial No. See next figure for detail description.Date: Packing Date
FG Code: FG Code of Product
REVO
ISSUE DATE2012.06.25
MODEL : HV070WS1-105SERIAL NO. : 0000000000000Q’TY : 40
DATE : XXXX. XX. XX
0000000000000TypeGradeYearMonthITEM-CODESerial_no
FG CODERoHS Mark
SPEC. NUMBERS864-1470(3/3)SPEC TITLE
HV070WS1-105 Product Specification
PAGE33OF 34A4(210 X 297) PRODUCT GROUPTFT LCD PRODUCT
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ISSUE DATE2012.06.25
16.0 PACKING INFORMATION
16.1 Packing order
Shield Bag
LCD Module
Bottom PAD
Anti Static Packing BAG
20EA Module per Inner-Box
Top PAD
Out Box
Cushion PAD
PackingLabelPacking Label
40EA Module per Inner-Box Assy
Notes : 1. Box Dimension: 350mm(W) X 265mm(D) X 320mm(H)Notes:1BoxDimension:350mm(W)X265mm(D)X320mm(H)
2. Package Quantity in one Box : 40pcsSPEC. NUMBERS864-1470(3/3)SPEC TITLE
HV070WS1-105 Product Specification
PAGE34OF 34A4(210 X 297)
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