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HV070WS1-105 Product Spec

来源:爱go旅游网
PROPRIETARY NOTE

THIS SPECIFICATION IS THE PROPERTY OF HYDIS AND SHALL NOT BE REPRODUCED OR COPIED WITHOUT THE WRITTEN PERMISSION OF HYDIS AND MUST BE RETURNED TO HYDIS UPON ITS REQUEST

TITLE : HV070WS1-105 Product Specificationp

HYDIS Technologies

SPEC. NUMBER

S864-1470(1/3)PRODUCT GROUPTFT LCDREV.AISSUE DATE2012.06.25

PAGE1OF 34A4(210 X 297)

PRODUCT GROUPTFT LCD PRODUCT

REVO

ISSUE DATE2012.06.25

REVISIONHISTORYREVISION HISTORY REV.0A

E1206-F005ECN NO.

DESCRIPTION OF CHANGES

󰂃Initial Release

󰂃Add Line Classification on Module Label No.3

(TOC: T, IDS: C)

DATE 2012.04.102012.06.25

PREPARED J.H. KimT.C.KANG

SPEC. NUMBERS864-1470(2/3)SPEC TITLE

HV070WS1-105 Product Specification

PAGE2OF 34A4(210 X 297) PRODUCT GROUPTFT LCD PRODUCT

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ISSUE DATE2012.06.25

Contents

No1.02.03.04.05.06.07.08.09.010.011011.012.013.014.015.016.0

General DescriptionAbsolute Maximum RatingsElectrical SpecificationsOptical SpecificationsInterface ConnectionsSignalTimingSpecificationsSignal Timing SpecificationsSignal Timing Waveforms

Input Signals, Basic Display Colors & Gray Scale of Colors3-Wire Special Port Interface (SPI Interface)Power Sequence

MechanicalCharacteristicsMechanical CharacteristicsMechanical DrawingReliability TestHandling & CautionsLabels

Packing Information

Item

Page4678131616191926272830313234

SPEC. NUMBERS864-1470(3/3)SPEC TITLE

HV070WS1-105 Product Specification

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ISSUE DATE2012.06.25

1.0 GENERAL DESCRIPTION

1.1 Introduction

HV070WS1-105 is a color active matrix TFT LCD module using amorphous silicon TFT's(Thin Film Transistors) as an active switching devices. This module has a 7.01 inch

diagonally measured active area with WSVGA resolutions (1024 horizontal by 600 verticalpixel array). Each pixel is divided into RED, GREEN, BLUE dots which are arranged invertical Stripe and this module can display 16.7M colors. The TFT-LCD panel used for thismodule is a low reflection and higher color type. dlilfltidhihlt

VCCLDO

VDDDC/DC

GammaVcom

Gaate DriverVendor[0]Vendor[1]

CN1BL-PWM-INBL-PWM-OUT

GroundVCC

TFT LCD Panel

1024 ×600

LVDS Input Signal

SourceDriverSource Driver

Back Light (SMD LED Array)

LEDP & LEDN

CN2

1.2Features1.2 Features

zFAB site : Hydis Korea

zThin and Light Weight

z3.3 V Logic Power & 16 V Back-light power Supplyz1 Channel LVDS Interface

zSMD LED (20EA) Array (Bottom Side/Horizontal Direction)z16.7M Colors (With Dither & HFRC)

zNeed SPI control (CSB, SCL, SDA) for module drivingNeedSPIcontrol(CSBSCLSDA)formoduledrivingzGreen Product (RoHS) & Halogen freeSPEC. NUMBERS864-1470(3/3)SPEC TITLE

HV070WS1-105 Product Specification

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1.3 ApplicationzE-book, etc

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ISSUE DATE2012.06.25

1.4 General Specifications

< Table 1. General Specifications >

PParametertActive area Number of pixels Pixel pitch Pixel arrangementDisplay colorsDisplay modeOutline dimensionWeight Back-lightBacklight

SSpecificationifiti

153.6(H) ×90.0(V)1024(H) ×600(V)0.15(H) ×0.15(V)RGB Vertical Stripe16.7MNormally Black

163.6±0.3(H)×102.9±0.3(V)×2.47±0.2(D)95 (Max.)

Bottomedgeside,20-LEDsBottom edge side, 20LEDs typetype

mmg

Note 2

colors

Note 1

UitUnitmmpixelsmm

RRemarkk

Note 1 : Support 16.7M with dither and HFRC

Note 2 : Without component

Horizontal outline dimension is some different to customer request which is162.8±0.3(H)×102.9±0.3(V)×2.47±0.2(D)

ButoutlinedimensionisconfirmvaluebetweenHydisandCustomerBut outline dimension is confirm value between Hydis and Customer

SPEC. NUMBER

S864-1470(3/3)SPEC TITLE

HV070WS1-105 Product Specification

PAGE5OF 34A4(210 X 297) PRODUCT GROUPTFT LCD PRODUCTREVOISSUE DATE2012.06.252.0 ABSOLUTE MAXIMUM RATINGSThe followings are maximum values which, if exceed, may cause faulty operation orThefollowingsaremaximumvalueswhichifexceedmaycausefaultyoperationordamage to the unit. Ta=25+/-2°C< Table 2. Absolute Maximum Ratings > ParameterLogic Power Supply VoltageBacklightPowerSupplyVoltageBack-light Power Supply Voltage Back-light LED CurrentBack-light LED Reverse VoltageOperating TemperatureStorage TemperatureSymbolVCCVLILVRTOPTSPMin.-0.3-0.303---20-40Max.VCC+0.340305+60+70UnitVVmAV℃℃Note 1, Note 2 Note1RemarksNote 1. Ambient temperature vs allowable forward current are shown in the figure below.Note 2. Temperature and relative humidity range are shown in the figure below.90% RH Max. ( 40℃≥ Ta)Maximum wet -bulb temperature at 39℃or less. ( > 40℃) No condensation.RelativeHumudity1009080(40, 90)60Operating Range(50, 50)40(60, 27)205-40 -20 0 20 40 60 80 Temperature (℃)(70, 20)Storage RangeSPEC. NUMBERS864-1470(3/3)SPEC TITLEHV070WS1-105 Product Specification PAGE6OF 34A4(210 X 297) PRODUCT GROUPTFT LCD PRODUCT

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3.0 ELECTRICAL SPECIFICATIONS

3.1 Electrical Specifications

< Table 3. Electrical Specifications >

Parameter

Logic Power Supply VoltageLogic Power Supply CurrentLogic Power ConsumptionBack-light Power Supply VoltageBack-light Power Supply CurrentBack-light Power ConsumptionHigh Level Differential Input Signal (VCM= 1.2V)

Low Level Differential Input Signal Input voltage range (singled-end)Differential input voltageDifferential input common mode voltageIInput CurrentCPanel unit life timeTotal Power Consumption

PtotalVCCICCPCVLILPBLVTHVTLVIN|VID|VCMVIN

-----0.100.1(|VID|/2)

-101050,000---2.01

Min.3.0-Typ.3.32200.7316201.28----Max.3.62700.8917251.360.1-2.40.62.4-(|VID|/2)

-1010-2.25

UnitVmAWV

Note 2

mAWVVV

LVDS input

VVμAHrsW

Without BL,PCBNote 1,2,4Note 2, 4Note 1

Remarks

Notes : 1. The supply voltage is measured and specified at the interface connector of LCM.

The logic current draw and power consumption specified is for 3.3V at 25℃.a) Typ : Window XP pattern, b) Max : White pattern

2. The supply voltage is measured and specified at the interface connector of LCM.The Backlight current draw and power consumption specified is 16V at 25℃.The voltage and current value means value for chain.3. PWM frequency and voltage level is fixed by customer.

4. Backlight power consumption is calculated value for reference (VL×IL ×4 chains).About maximum power of backlight is pg17V ×20mA ×4 chains = 1.36W

SPEC. NUMBER

S864-1470(3/3)SPEC TITLE

HV070WS1-105 Product Specification

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ISSUE DATE2012.06.25

4.0 OPTICAL SPECIFICATIONS

4.1 Overview

The test of optical specifications shall be measured in a dark room (ambient luminance ≤1lux andtemperature = 25±2℃) with the equipment of Luminance meter system (Goniometersystem and TOPCON BM-5A) and test unit shall be located at an approximate distance50cm from the LCD surface at a viewing angle of θ and Φ equal to 0°. We refer to θØ=0(=θ3 ) as the 3 o’clock direction (the “right”), θØ=90 (= θ12 ) as the 12 o’clock direction(“upward”), θØ=180(= θ9 ) as the 9 o’clock direction (“left”) and θØ=270(= θ6 ) as the 6o’clock direction (“bottom”). While scanning ’lkditi(“btt”)Whiliθ and/or Ø, the center of the measuring spot ond/Øthtfthitthe Display surface shall stay fixed. VCCshall be 3.3+/-0.3V at 25°C. 4.2 Optical Specifications

Parameter

Viewing Angle

range

HorizontalVertical

Symbol

Θ3Θ9Θ12Θ6CRYw

ConditionMin.

7575757564034072

Typ.

8585858580030400800.3010.3300.5930.3530.3130.5890.1510.12950-

Max.UnitRemarks

Deg.Deg.Deg.Deg.

Note 1

CR > 10

Luminance Contrast ratioLuminance of

1 Points

WhiteWhite Luminance 9 Pointsuniformity

White Chromaticity

Red

Reproductionof color

GreenBlue

ResponseTimeCross Talk

Θ = 0°---0.3400.3700.6230.3830.3430.6190.1810.159-2.0

ms%cd/m2cd/m2%

Note 2Note 4Note 5

Θ = 0=0°

∆Y9WxWyRxRyGxGyBxByTotal

(Tr+Td)CT

Ta= 25°CΘ = 0°Θ = 0°Θ = 0°Θ = 0°

0.2800.3100.5630.3230.2830.5590.1210.099--

Nt3Note 3

Note6 Note7

SPEC. NUMBER

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Notes :

1. Viewing angle is the angle at which the contrast ratio is greater than 10. The viewing angles are determined for the horizontal or 3, 9 o’clock direction and the vertical or 6, 12 o’clock direction with respect to the optical axis which is normal to the LCD surface (see Figure1).

2. Contrast measurements shall be made at viewing angle of ggΘ= 0 and at the center of the LCD surface. Luminance shall be measured with all pixels in the view field set first to white, then to the dark (black) state (see Figure1). Luminance Contrast Ratio (CR) is defined mathematically as CR = Luminance when displaying a white raster / Luminance when displaying a black raster.

3. Reference only / Standard Front Surface Treatment Measured with green cover glass. The color chromaticity coordinates specified in Table 4 shall be calculated from the

spectral data measured with all pixels first in red, green, blue and white. Measurements shall be made at the center of the panel.

4. The luminance value of 400 cd/m2 means the brightness of PWM is 100%. The luminance value of 30 cd/m2 means the brightness of lower PWM. CTF means that measure brightness at only center point at Figure 2.

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4.3 Optical Measurements

Figure 1. Measurement Set Up

Photo detector(MINOLTA CA210)

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ISSUE DATE2012.06.25

TFT-LCD module LCD panel

Center of the screen

Optical characteristics measurement setup

Figure 2. Uniformity Measurement Locations (9 points)

ColumnRow34

34

512

990

300

566

Note 5.

The White luminance uniformity on LCD surface is then expressed as :

∆Y = ( Minimum Luminance of 9 points / Maximum Luminance of 9 points ) * 100 Refer Figure 2 about measurement points

* LED Condition = (Duty Ratio 100%, LED current 20mA)

SPEC TITLE

HV070WS1-105 Product Specification

SPEC. NUMBERS864-1470(3/3)PAGE10OF 34A4(210 X 297) PRODUCT GROUPTFT LCD PRODUCTFigure 3. Response Time TestingREVOISSUE DATE2012.06.25 TFT Off(Black) TFT On(White)TFT Off(Black)TdTr100%90%10%0%SPEC. NUMBERS864-1470(3/3)SPEC TITLEHV070WS1-105 Product Specification PAGE11OF 34A4(210 X 297) PRODUCT GROUPTFT LCD PRODUCT

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Figure4.CrossModulationTestDescriptionFigure 4. Cross Modulation Test Description

VIEW AREA

VIEW AREA256,150

768,150L31

256,450

768,450YB(768, 300)

YA(768, 300)Cross-Talk (%) =

Where:

YB-YAYB

L256

×100

YA= Initial luminance of measured area (cd/m2)

YB= Subsequent luminance of measured area (cd/m2)

The location measured will be exactly the same in both patterns

Note 6.

The electro-optical response time measurements shall be made as Figure 3 by switching the “data” input signal ON and OFF. The times needed for the luminance to change from 10% to 90% is Tr, and 90% to 10% is Td.

Note 7.

Cross-Talk of one area of the LCD surface by another shall be measured by

comparing the luminance (YA) of a 25mm diameter area, with all display pixels set to a gray level, to the luminance (YB) of that same area when any adjacent area is driven dark (Refer to Figure 4).

SPEC. NUMBERS864-1470(3/3)SPEC TITLE

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ISSUE DATE2012.06.25

5.0 INTERFACE CONNECTIONS

5.1 Electrical Interface Connection

CN1 Interface Connector (DF23C-30DS-0.5V(51), Manufacture by HIROSE)

Pin No.123456789101112131415

SymbolVCCGNDVCCCLK-IN-NVCCCLK-IN-PGNDGNDLEDPD0-IN-NLEDND0-IN-PGNDGNDVendor[0]

Function

+3.3V Power SupplyGround

+3.3V Power SupplyLVDS Clock input (Negative)+3.3V Power SupplyLVDS Clock input (Positive)GroundGround

Power supply for LED [Anode]LDVS differential data inputPower supply for LED [Cathode]LDVS differential data inputGroundGround

Vendor distinguish pin 1

Pin No.161718192021222324252627282930

SymbolD1-IN-NVendor[1]D1-IN-PCSBGNDSCLD2-IN-NSDAD2-IN-PGNDGNDBL-PWM-IND3-IN-NBL-PWM-OUTD3-IN-P

Function

LDVS differential data inputVendordistinguishpin2Vendor distinguish pin 2LDVS differential data inputSerial Communication Chip SelectGround

Serial Communication Clock InputLDVS differential data inputSerial Communication Data InputLDVS differential data inputGroundGround

Brightness Control SignalpLDVS differential data inputBacklight Dimmer SignalLDVS differential data input

SPEC. NUMBER

S864-1470(3/3)SPEC TITLE

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5.2 LVDS Interface

LVDS Transmitter : THC63LVDM83A

InputsignalR0R1R2R3R4R5G0G1G2G3G4G5B0B1B2B3B4B5HSYNCVSYNCDER6R7G6G7B6B7ReservedMCLK

TransmitterPin No5152545556346711121415192022232427283050281016182531

Pin No

Interface

System (Tx)

TFT-LCD (Rx)

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ISSUE DATE2012.06.25

AA01B-P030VA1Pin No.

Remark

4847OUT0-OUT0+D0-IN-ND0-IN-P1012

4645OUT1-OUT1+D1-IN-ND1-IN-P1618

4241OUT2-OUT2+D2-IN-ND2-IN-P2224

3837OUT3-OUT3+D3-IN-ND3-IN-P2830

4039CLKOUT-CLKOUTCLKOUT+CLK-IN-NCLKINNCLK-IN-P46SPEC. NUMBERS864-1470(3/3)SPEC TITLE

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5.3 Back-light Interface

CN2 LED FPC Connector ( solder type(yp)

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ISSUE DATE2012.06.25

Pin No.1234

SymbolAnode1

Function

LED Anode Power SupplyLEDCthdPLED Cathode Power SupplySlLED Cathode Power Supply

Typ. 16V

Remark

Cathode1

5.4 Data Input Format

(1, 1)(2, 1)RGBRGB

(1023, 1)(1024, 1)RGBRGB

1 Pixel = 3 Dots

RGB

RGBRGB(1, 600)

(2, 600)

RGBRGB(1023, 600)(1024, 600)

SPEC. NUMBERS864-1470(3/3)SPEC TITLE

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6.0. SIGNAL TIMING SPECIFICATIONS

6.1TimingspecificationatHVMode(LVDSTransmitterInput)6.1 Timing specification at HV Mode (LVDS Transmitter Input

Item

Frame RateFrame PeriodVertical Display TimeVertical Blanking Time1 Line Scanning TimeHorizontal Display TimeHorizontal Blanking TimeClock Rate

Symbol

-T1T2T3T4T5T61/T7

Min.40624--1200--40.8

Typ.60635600351344102432051.2

Max.73750--1400--63

UnitHzLinesLinesLinesClocksClocksClocksMHz

70SIGNALTIMINGWAVEFORMS7.0 SIGNAL TIMING WAVEFORMS

7.1 Vertical Input Timing Waveforms of Interface Signal

T1

VSD

T3HSDDEN

T2……

……

7.2 Horizontal Input Timing Waveforms of Interface Signal

T4

HSD

T6T7DCLKDEN

T5

……

……

SPEC. NUMBERS864-1470(3/3)SPEC TITLE

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7.3 LVDS Rx Interface Timing Parameter

ThespecificationoftheLVDSRxinterfacetimingparameterThe specification of the LVDS Rx interface timing parameter

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< Table 9, LVDS Rx Interface Timing Specification>

ItemCLKIN PeriodInputData0Input Data 0Input Data 1Input Data 2Input Data 3Input Data 4Input Data 5Input Data 6

SymboltRCIPtRIP0tRIP1tRIP2tRIP3tRIP4tRIP5tRIP6

Min.--00.44tRICP/7-0.4

Typ.19.53000.0tRICP/7

Max.-+04+0.4tRICP/7+0.4

UnitRemarksnsecnsecnsec

2 ×tRICP/7-0.42 ×tRICP/72 ×tRICP/7+0.4nsec3 ×tRICP/7-0.43 ×tRICP/73 ×tRICP/7+0.4nsec4 ×tRICP/7-0.44 ×tRICP/74 ×tRICP/7+0.4nsec5 ×tRICP/7-0.45 ×tRICP/75 ×tRICP/7+0.4nsec6 ×tRICP/7-0.46 ×tRICP/76 ×tRICP/7+0.4nsec

tRIP6tRIP5tRIP4tRIP3tRIP2tRIP1

tRIP0

RxINz +/-* Z = 0, 1, 2 RxCLKIN+/-Rx

Rx

Rx

Rx

Rx

Rx

Rx

Rx

Rx

Rx

Rx

Vdiff=0[v]tRCIP

Vdiff=0[v]SPEC. NUMBERS864-1470(3/3)SPEC TITLE

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8.0 INPUT SIGNALS, BASIC DISPLAY COLORS & GRAY SCALE OF

COLORS

A total of 16.7M colors are displayed with dither & HFRC using 64 gray from 8bit input.

Colors & Gray Scale

BlackBlueGreen

Basic BiColors

LightBlueLight BlueRedPurpleYellowWhiteBlack△Darker

Gray Scale GrayScale

of Red

△▽Brighter▽RedBlack△Darker

Gray Scale of Green

△▽Brighter▽GreenBlack△Darker

Gray Scale ofBlueof Blue

△▽Brighter▽Blue

Black△

Gray Scale

of White & Black

Darker△▽Brighter▽White

1

1

1

1

1

0

1

1↓1

1

1

1

1

1

1

1

000010

000001

000000

000000↓↓1

1

1

1

1

0

1

1↓1

1

1

1

1

1

1

1

000000

000000

000000

000000↓↓000000

000000

000000

000000

000010

000001

000000

000000↓↓1

1

1

1

1

0

1

1↓1

1

1

1

1000

1000

1000

1000↓↓000000

000000

000000

000000

1000

1000

1000

1000↓↓000000

000000

000000

000000

1010

1001

1000

1000↓↓1

1

1

1

1

0

1

1↓1000

1000

1000

1000

1

0

1

1↓1000

1000

1000

1000

1

0

1

1↓1000

1000

1000

1000

00001111010

00001111001

00001111000

Red data

00001111000↓↓1

1

1

1

000010

000001

00001111000

00001111000

00001111000

00001111000

00110011000

00110011000

Data signalGreen data

00110011000

00110011000↓↓

000000

000000↓↓1

1

1

1

000010

000001

000000

000000

000000

000000

000000

000000

000000

000000

00110011000

00110011000

00110011000

00110011000

01010101000

01010101000

01010101000

Blue data

01010101000↓↓000000↓↓000000↓↓1

1

1

1

000000

000000

000000

000000

000000

000000

000000

000000

01010101000

01010101000

01010101000

01010101000

R0R1R2R3R4R5R6R7G0G1G2G3G4G5G6G7B0B1B2B3B4B5B6B7

SPEC. NUMBERS864-1470(3/3)SPEC TITLE

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9.0 3-WIRE SERIAL PORT INTERFACE (SPI INTERFACE)

Thismoduleuse3wireserialportinterfaceasfunctionconfigurationandparametersettingThis module use 3-wire serial port interface as function configuration and parameter setting9.1 3-Wire command format

Address[5:0]

W/RHi-Z

Data[7:0]

Delay

Next Transfer

CSBSDASCL

D15

D14D13D12

D11D10

D9

D8

D7

D6

D5

D4

D3

D2

D1

D0

D15

D14

BitD15-D10D9D9D7-D0

Description

Register Address [5:0]

W/R control bit. “0” for Write; “1” for Read

Hi-z bit during read mode. Any data within this bits will be ignored during write ModeData for the W/R operation to the address indicated by Address phase

9.2 3-Wire Write format

MSB

D15

D14

D13

D12

D11

D10

D90

D8X

D7

D6

D5

D4

D3

D2

D1

Register Address [5:0]

Data (Issued by external controller)

LSB

D1

9.3 3-Wire Read format

MSB

D15

D14

D13

D12

D11

D10

D91

D8

Hi-Z

LSB

D2

D1

D1

D7D6D5D4D3

Register Address [5:0]Data (Issued by 3-wire engine)

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9.4 3-wire control register

9.4.1 R00 : System Control Register

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ISSUE DATE2012.06.25

DesignationMODE

AddressR0[0]

Description

DE/SYNC mode select.

MODE = “0”, HSD/VSD mode.MODE = “1”, DE mode. (Default)

DCLK polarity control bit

DCLKPOL = “0” : Data sampling at DCLK falling edge. (Default)DCLKPOL = “1” : Data sampling at DCLK rising edge.Global reset bit.

GRB=“0”, The controller is in reset state.GRB=“1”, Normal operation. (Default)

Standby mode selection bit.Standbymodeselectionbit

STBYB = “0”, Timing control, driver and DC-DC converter, are off,and all outputs are High-Z.

STBYB = “1”, Normal operation. (Default)

Gate Up or Down scan control.

UPDN = “0”, STV2 output vertical start pulse and UD pin outputLogical “0” to Gate driver. (Default)

ppppUPDN = “1”, STV1 output vertical start pulse and UD pin output

Logical “1” to Gate driver. (Default)

Right/Left sequence control of source driver.

SHLR = “0”, Shift left : Last data = S1<-S2<-S3…<-S960 = First DataSHLR = “1”, Shift left : Last data = S1->S2->S3…->S960 = Last Data(Default)Reserved

POWER enable.

PWR_EN = H, enable PWM, Charge pump and VCOM buffer.

DCKPOLR0[1]

GRBR0[2]

STBYBR0[3]

UPDNR0[4]

SHLRR0[5]

-PWR_EN

R0[6]R0[7]

SPEC. NUMBERS864-1470(3/3)SPEC TITLE

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9.4.2 R01 : System Control Register

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DesignationAddressR1[0]

DescriptionReserved

Display resolution selection.

RES[1:0] = “01”, for 1024(RGB)*768 display resolution.(dual or cascade)

RES[1:0] = “00”, for 1024(RGB)*600 display resolution.(dualorcascade)(Default)(dual or cascade) (Default)

RES[1:0] = “10”, for 800(RGB)*600 display resolution.(dual or cascade)

RES[1:0] = “11”, for 800(RGB)*480 display resolution.(dual or cascade) (601~936 channel disable)Normal Operation / BIST pattern select.BIST = H : BIST (DCLK input is not needed)BIST = L : Normal Operation (Default)

Dithering function enable control.

DITHER = “1”, Enable internal dithering function.

DITHER = “0”, Disable internal dithering function. (Default)H-FRC selection

HFRC = H : H-FRC enable

HFRC = L : H-FRC disable (Default)

If DITHER = H and HFRC = L : enable only FRC/dithering functionIfDITHERLdisableditheringfunctionIf DITHER = L, disable dithering function (H-FRC and FRC both disable)

CABC H/W enable pin. Normally pull low.

When CABC_EN = “00”, CABC OFF. (Default mode)When CABC_EN = “01”, User interface Image.When CABC_EN = “10”, Still Picture.When CABC_EN = “11”, Moving Image.

RES[1:0]R1[2:1]

BISTR1[3]

DITHERR1[4]

HFRCR1[5]

CABC_EN[1:0]R1[7:6]

9.4.3 R02 : System Control Register

DesignationAddressR2[5:0]

DescriptionReserved

Normally black or normally white setting.NBW = H : Normally blackNBWLNNBW = L : Normally white (Default)llhit(Dflt)Reserved

NBWBIST

R2[6]R2[7]

SPEC. NUMBER

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9.4.4 R03 : Gate on sequence controller register

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ISSUE DATE2012.06.25

DesignationAddressDescription

Gate on sequence select

SEL[0]1

SEL[1]1

Pin control function

SEL[1:0]R3[1:0]

10

00

Frame-R3[2]R3[7:3]

10

Z (Default)

Frame inverse or not select.FRAME = “1”, Uniform

FRAME = “0”, Frame inverse (Default)Reserved

9.4.5 R0E : test mode (1)

DesignationTEST_mode(1)

AddressR0E[7:0]

Description

Enter test mode (1)

TEST_mode = 8’h5F, enter

TEST_mode = other exit (Default)

9.4.6 R0F : test mode (2)

DesignationTEST_mode(2)

AddressR0F[7:0]

Description

Enter test mode (2)

TEST_mode = 8’hA4, enter

TEST_mode = other exit (Default)

SPEC. NUMBERS864-1470(3/3)SPEC TITLE

HV070WS1-105 Product Specification

PAGE22OF 34A4(210 X 297) PRODUCT GROUPTFT LCD PRODUCT

9.4.7 R0D : charging time control (3)

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ISSUE DATE2012.06.25

DesignationOE_WIDTH

AddressR0D[7:0]

Description

Inversion type select. Enter Test mode (1) and (2) first.Then R0D setting will be active

TEST_mode = 8’h00, increase charge time

948R02:chargesharingcontrol9.4.8 R02 : charge sharing control

DesignationEQC_ADJ

AddressR02[7:0]

Description

Inversion type select. Enter Test mode (1) and (2) first.

Then R10 setting will be active

EQC_ADJ = 8’h43, adjust charge sharing time

9.4.9 R0A : BIAS current control (5)

DesignationBIAS_TRIG

AddressR0A[7:0]

Description

Inversion type select. Enter Test mode (1) and (2) first.Then R10 setting will be active

BIAS_TRIG = 8’h28, trigger bias reduction

9.4.10 R10 : inversion architecture

DesignationAddressDescription

Inversion type select. Enter Test mode (1) and (2) first.Then R10 setting will be active2line / 1dot = 8’h41

1line / 1dot = 8’h01 (Default)

INVR10F[7:0]

SPEC. NUMBERS864-1470(3/3)SPEC TITLE

HV070WS1-105 Product Specification

PAGE23OF 34A4(210 X 297) PRODUCT GROUPTFT LCD PRODUCT

9.4.11 R38 : PWM_DIV setting

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ISSUE DATE2012.06.25

DesignationAddressDescription

PWM Dimmer frequency step settingR38[7:0]0x0C0x1C0x2C0x3C0x4C0x5C0x6C0x7C

PWM_DIV[3:0]

000001010011100101110111

Register functionDon’t use.

1234567 (Default)

Real PWM Frequency of DIMO

FOSC

PWM Frequency = 256 x 128 x PWM_DIV[2:0]

PWM_DIV[3:0]R38[7:0]

PWM ReferenceFrequency (FOSC)51.2MHz (Typical)

In order in maintain the dimming frequency for brightness control

at different display resolution (typical 1024 x 600) at normal mode. We will change default value of PWM_DIV to follow as tableDisplay ResolutionRES[1:0] = “00”[]RES[1:0] = “01”RES[1:0] = “10”RES[1:0] = “11”

Default value of PWM_DIV

111111110100

Note : The R6 and R38 register will be available when the R0E and R0F register already had issued.

SPEC. NUMBER

S864-1470(3/3)SPEC TITLE

HV070WS1-105 Product Specification

PAGE24OF 34A4(210 X 297) PRODUCT GROUPTFT LCD PRODUCT

9.5 Recommend Register Setting (CABC Off mode)

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ISSUE DATE2012.06.25

Register write sequence : R00 (Reset)ÆR00 (Into Standby mode) ÆR01 (Enable FRC / Dither, CABC off) ÆR02 (Enable Normally Black) ÆR0E (Enter Test mode (1)) ÆR0F (Enter Test mode (2))ÆR0D (SDRRS on) ÆR00 (Release standby mode)

If you don’t use register write sequence, it may cause faulty operation.

D15

D14

D13

D12

D11

D10

D9

D8

D7

D6

D5

D4

D3

D2

D1

D0

Setting0x00290x00250x04300x08400x385F0x3CA40X4041000x34010x002D

Remark

R00R00R01R02R0ER0FR10R0DR00

000000000

000000100

000011010

000011010

000111000

001001010

000000000

000000000

000001000

000110100

111001001

001010000

100010001

010011001

000010000

110010111

2dot inv.dot

9.6 Recommend Register Setting (CABC on mode (Moving Picture)

Register write sequence : R00 (Reset)ÆR00 (Into Standby mode) ÆR01 (Enable FRC / Dither, CABC on) Æ

R02 (Enable Normally Black) ÆR0E (Enter Test mode (1)) ÆR0F (Enter Test mode (2)) ÆR0D (SDRRS on)ÆR38 (PWM Frequency = 1.5KHz) R38 (PWM Frequency 1.5KHz) ÆR00 (Release standby mode)If you don’t use register write sequence, it may cause faulty operation.

D15

D14

D13

D12

D11

D10

D9

D8

D7

D6

D5

D4

D3

D2

D1

D0

Setting0x00290x00250x04F00x08400x385F0x3CA40X40410x34010E01C0xE01C0x002D

Remark

R00R00R01R02R0ER0FR10R0DR38R00

0000000010

0000001010

0000110110

0000110100

0001110000

0010010100

0000000000

0000000000

0000010000

0001101000

1110010001

0010100010

1000100011

0100110011

0000100000

1100101101

2dot inv.

SPEC. NUMBERS864-1470(3/3)SPEC TITLE

HV070WS1-105 Product Specification

PAGE25OF 34A4(210 X 297) PRODUCT GROUPTFT LCD PRODUCT

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ISSUE DATE2012.06.25

10.0 POWER SEQUENCE

To prevent a latch-up or DC operation of the LCD module, the power on/off sequence shallppp,pqbe as shown in below

90%

Power Supply for LCD

VCC

90%

10%

0V

10%

T1

T2ValidData

T5T7T6

Interface Signal

Vi

0V

(LVDS Signal of Transmitter)Initial 3-Wire Command

T3

LEDPower

T4

LEDON

OFF

OFF

Parameter

T1T2T3T4T5T6T7

Value

Min.0.5020020003400

Typ.

Max.1016

Unitmsmsmsmsmsmsms

Remark

Notes : 1. When the power supply VDD is 0V, Keep the level of input signals on the low or keep

high impedance.

2Donotkeeptheinterfacesignalhighimpedancewhenpowerison2. Do not keep the interface signal high impedance when power is on.

3. Back Light must be turn on after power for logic and interface signal are valid.SPEC. NUMBERS864-1470(3/3)SPEC TITLE

HV070WS1-105 Product Specification

PAGE26OF 34A4(210 X 297) PRODUCT GROUPTFT LCD PRODUCT

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ISSUE DATE2012.06.25

11.0 MECHANICAL CHARACTERISTICS

11.1 Dimensional Requirements111DiilRit

Figure 5 & 6 (located in 12.0) shows mechanical outlines for the model

Parameter

Active AreaNbNumber of pixelsfilPixel pitchPixel arrangementDisplay colorsDisplay modeOutlinedimensionOutline dimensionWeight Back-light

Specification

153.60(H) X 90.00(V)

1024(H)X600(V)(1ilRGBdt)1024(H) X 600(V) (1 pixel = R + G + B dots)0.15(H) X 0.15(V)RGB Vertical stripe16.7MNormally Black

1636±0.3(H)163.603(H)×102.91029±0.3(V)03(V)×2.47247±0.2(D)02(D)95 (Max.)

Edge side 20-LEDs type ( 5 X 4 Array)

mmgUnitmm

11.2 Polarizer Hardness.

The surface of the LCD has an coating to reduce scratching.

11.3 Light Leakage

There shall not be visible light from the back-lighting system around the edges of the screen as seen from a distance 50cm from the screen with an overhead light level of

150lux. The manufacture shall furnish limit samples of the panel showing the light leakage acceptable.

SPEC. NUMBERS864-1470(3/3)SPEC TITLE

HV070WS1-105 Product Specification

PAGE27OF 34A4(210 X 297) PRODUCT GROUPTFT LCD PRODUCTREVOISSUE DATE2012.06.2512.0 MECHANICAL DRAWINGFigure5.TFT-LCDFigure 5. TFTLCD Module Outline Dimension (Front View)ModuleOutlineDimension(FrontView)SPEC. NUMBERS864-1470(3/3)SPEC TITLEHV070WS1-105 Product Specification PAGE28OF 34A4(210 X 297) PRODUCT GROUPTFT LCD PRODUCT

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ISSUE DATE2012.06.25

Figure 6. TFT-LCD Module Outline Dimensions (Rear view)

SPEC. NUMBERS864-1470(3/3)SPEC TITLE

HV070WS1-105 Product Specification

PAGE29OF 34A4(210 X 297) PRODUCT GROUPTFT LCD PRODUCT

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ISSUE DATE2012.06.25

13.0 RELIABLITY TEST

TheReliabilitytestitemsanditsconditionsareshowninbelowThe Reliability test items and its conditions are shown in below.

No

Test Item

Temperature and Humidity test

(Operation)

Temperature and Humidity Cycling(Storage)Thermal shock

Low temperature storage testLow Temperature Test (Operation)BiasedHumidity/HeatSoak Test(Storage)Altitude storageHot Start TestCold Start TestMechanicalshockMechanical shock

Mechanical Random vibration4 Pt Bend TestRing on Ring TestESD

1. Ta = 40℃/90% 24hr

2. Ta = 40℃/30% 24hr3. Ta = 0℃24hr

Ta = 85℃/90%RH (2H) ,-20℃(2H),Waypoint(25℃25% RH turn off Humidity control) 12cycle. 144HrTa = -40 °C ↔85 °C

(30min residence), 100 cycleTa = -40 °C, 300 hrsTa = -20 °C, 300hrsTa = 85 °C/85%, 300hr20000 ft/-40 °C, 24hr

Ta = 85 °C 1hr, power on/off per 5m, 5 timeTa = -40°C 1hr, power on/off per 5m, 5 time

100 G, 6 ms, half sine wave(±X,±Y,±Z). Acceleration measured shock table.

3.5 Grms, PSD =0.025g2/Hz, 5-500 Hz15 minutes in all axes (X, Y, Z)

1. 7 kgf deflection. Scribed edge side up2. 4 kgf deflection. Scribed edge side downX kgf applied. Load rae:75mm/min

Screen: 150 pF, 330 Ohm, +/-15kV air, +/-8 kV contact. FPC: 100 pFm100 Ohm, +/-200V10 points, 20times/ptPage flip script, 2 m flips

Conditions

1

234567891011121314

15Functional Test

Notes :

1Exceptformovertheconditionsofthepolarizerspecifications1. Except form over the conditions of the polarizer specifications.2. ESD test condition is standard of customer system.SPEC. NUMBERS864-1470(3/3)SPEC TITLE

HV070WS1-105 Product Specification

PAGE30OF 34A4(210 X 297) PRODUCT GROUPTFT LCD PRODUCT

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ISSUE DATE2012.06.25

14.0 HANDLING & CAUTIONS

14.1 Cautions when taking out the module141Cautionswhentakingoutthemodule

yPick the pouch only, when taking out module from a shipping package.14.2 Cautions for handling the module

yAs the electrostatic discharges may break the LCD module, handle the LCD module withcare. Peel a protection sheet off from the LCD panel surface as slowly as possible.

yAs the LCD panel and back -light element are made from fragile glass (epoxy) material,impulse and pressure to the LCD module should be avoided.

yAs the surface of the polarizer is very soft and easily scratched, use a soft dryAthffthliiftdilthdftdclothlthwithout chemicals for cleaning.

yDo not pull the interface connector in or out while the LCD module is operating.yPut the module display side down on a flat horizontal plane.yHandle connectors and cables with care.14.3 Cautions for the operation

yWhen the module is operating, do not lose MCLK, DE signals. If any one of these signalswere lost, the LCD panel would be damaged.

yObey the supply voltage sequence. If wrong sequence is applied, the modulewould bedamaged.

14.4 Cautions for the atmosphere

yDew drop atmosphere should be avoided.

yDo not store and/or operate the LCD module in a high temperature and/or humidity

pgpypgpyatmosphere. Storage in an electro-conductive polymer packing pouch and under relativelylow temperature atmosphere is recommended.14.5 Cautions for the module characteristics

yDo not apply fixed pattern data signal to the LCD module at product aging. yApplying fixed pattern for a long time may cause image sticking.14.6 Cautions for the digitizer assembly

yWhen assembling FPC connector, do not flip connector past 90°due to possible damage toconnectorto connector.

yWhen positioning digitizer underneath driver IC, do not lift driver IC past 90°due to possible damage to drive IC pattern.

yPlease be warned that during assembly of digitizer, the opening or closing of FPC will result in possible electrostatic discharge damage to the LED14.7 Other cautions

yDo not re-adjust variable resistor or switch etc.

yWhen returning the module for repair or etc., Please pack the module not to be broken.WhenreturningthemoduleforrepairoretcPleasepackthemodulenottobebrokenWe recommend to use the original shipping packages.SPEC. NUMBERS864-1470(3/3)SPEC TITLE

HV070WS1-105 Product Specification

PAGE31OF 34A4(210 X 297) PRODUCT GROUPTFT LCD PRODUCT

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ISSUE DATE2012.06.25

15.0 LABELS

15.1 Product Label

HV070WS1-105

Customer BarcodeVVV

P

P

P

P

P

P

P

P

P

P

P

YY

WW

ZZZZ

0103Vd01~03 : Vendor coded04~14 : QPN

15~16 : Manufactured year

1718M17~18 : Manufactured weekftdk

19~22 : Serial number (32 digit/alphabet)

HYDIS Barcode1

2

3

4

5

6

7

XXXXXXXXXXXXXXXXX

No 1. Control NumberNo 2. Rank / Grade

No 3. Line Classification

(Hydis:HTOC:TIDS:C)(Hydis: H, TOC: T, IDS: C)No 4. Year (5 : 2005, 6 : 2006, …)

No 5. Month (1, 2, 3,…, 9, X, Y, Z)No 6. FG CodeNo 7. Serial Number

SPEC. NUMBER

S864-1470(3/3)SPEC TITLE

HV070WS1-105 Product Specification

PAGE32OF 34A4(210 X 297) PRODUCT GROUPTFT LCD PRODUCT

15.2 Packing Label

Label Size: 108 mm (L) ×56 mm (W) Contents

Model: HV070WS1-105

Q`ty: Module Q`ty in one box

Serial No.: Box Serial No. See next figure for detail description.Date: Packing Date

FG Code: FG Code of Product

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ISSUE DATE2012.06.25

MODEL : HV070WS1-105SERIAL NO. : 0000000000000Q’TY : 40

DATE : XXXX. XX. XX

0000000000000TypeGradeYearMonthITEM-CODESerial_no

FG CODERoHS Mark

SPEC. NUMBERS864-1470(3/3)SPEC TITLE

HV070WS1-105 Product Specification

PAGE33OF 34A4(210 X 297) PRODUCT GROUPTFT LCD PRODUCT

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ISSUE DATE2012.06.25

16.0 PACKING INFORMATION

16.1 Packing order

Shield Bag

LCD Module

Bottom PAD

Anti Static Packing BAG

20EA Module per Inner-Box

Top PAD

Out Box

Cushion PAD

PackingLabelPacking Label

40EA Module per Inner-Box Assy

Notes : 1. Box Dimension: 350mm(W) X 265mm(D) X 320mm(H)Notes:1BoxDimension:350mm(W)X265mm(D)X320mm(H)

2. Package Quantity in one Box : 40pcsSPEC. NUMBERS864-1470(3/3)SPEC TITLE

HV070WS1-105 Product Specification

PAGE34OF 34A4(210 X 297)

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