Write-back cache with ECC protection

专利名称：Write-back cache with ECC protection发明人：Michael A. Callander申请号：US07/591199申请日：19901001公开号：US05233616A公开日：19930803

摘要：This invention relates to a write-back cache which is protected with parity anderror correction coding (\"ECC\"). The parity and ECC codes are generated by a memoryinterface when data is transferred by main memory to the central processing unit (\"CPU\")associated with the cache. Thus, all data originating in main memory will be parity and ECCencoded when it passes through the memory interface, and the data, and its relatedparity information and ECC codes will be stored in the cache. On the other hand, datawhich is taken from the cache and modified by the CPU during its processing operations isalso transferred to the memory interface for ECC encoding. Thus, all data modified bythe CPU is also protected, and the modified data, and its related parity information andECC codes are also stored in the cache. The memory interface also contains ECC checkingand correcting circuitry which can correct erroneous data, on the basis of its ECC code, ifthat data has been corrupted while stored in the cache, or during transmission on a bus.Therefore, if data in the cache is corrupted, it can be corrected when it is returned tomain memory via the memory interface. Accordingly, the invention makes a write-backcache compatible with full ECC protection, even though, at times, the cache may containthe only correct, current copy of given data in the system.

申请人：DIGITAL EQUIPMENT CORPORATION

代理人：William P. Skladony,Ronald E. Myrick,Barry N. Young

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