专利名称：Field-effect transistor placement
optimization for improved leaf cellroutability
发明人：Iris Maria Leefken,Silke Penth,Michael
Stetter,Tobias T. Werner
申请号：US15586851申请日：20170504公开号：US10394994B2公开日：20190827
专利附图：
摘要：A processor-implemented method for automatically generating a layout of a
cell of a semiconductor circuit is provided herein. The processor-implemented methodincludes reading a netlist of the cell. The netlist includes a description of internalelectrical nets connecting electrical components of the cell with each other. Theprocessor-implemented method assigning a weight to an internal net of the internalelectrical nets and placing the electrical components in an area of the semiconductorcircuit based on the netlist and the weight to generate the layout of the cell of thesemiconductor circuit.
申请人：International Business Machines Corporation
地址：Armonk NY US
国籍：US
代理机构：Cantor Colburn LLP
代理人：Margaret McNamara
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