Cache memory system

专利名称：Cache memory system发明人：Kah-Ho Phong,Lucas Y.W. Hui申请号：US10677629申请日：20031002

公开号：US20040141554A1公开日：20040722

专利附图：

摘要：A cache memory system for use in a motion estimation system is disclosed. Thesystem includes: a first cache memory defined in terms of a first width and a first height,and a second cache memory defined in terms of a second width and a second height,wherein said second height is less than said first height, the cache memory system being

operable in one of two modes: the first mode being characterized by banks of memoryfrom the second cache memory being concatenated vertically such that their

concatenated height is at least equal to the first height, and said concatenated banksbeing arranged to be appended to the width of the first cache memory to form a singlecontiguous address space; and the second mode being characterized by banks ofmemory from the first and second cache being stacked vertically, and being arranged tobe addressed as two separate address spaces.

申请人：ST MICROELECTRONICS ASIA

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