Logic diagram processing device and logic diagram

专利名称：Logic diagram processing device and logic

diagram processing method

发明人：Mitsunobu Yoshinaga,Tadashi Oi,Shinichiro

Tsudaka,Masayo Nakagawa

申请号：US13780837申请日：20130228公开号：US09031672B2公开日：20150512

专利附图：

摘要：A logic diagram processing device has a logic diagram relocating unit whichrelocates operation elements while maintaining control logics equivalently so that the

operation elements as compared overlap in the case where a plurality of designatedlogic diagrams are overlapped, and a logic diagram overlapping unit which overlaps theplurality of designated logic diagrams in which the operation elements are relocated bythe logic diagram relocating unit. The logic diagram processing device also includes adisplay unit which displays the plurality of designated logic diagrams overlapped by thelogic diagram overlapping unit in a predetermined display method by which a commonpart or the difference of the operation elements can be discriminated, and a displaycontrol unit which switches the predetermined display method to display in the displayunit in accordance with an instruction from the outside.

申请人：Mitsunobu Yoshinaga,Tadashi Oi,Shinichiro Tsudaka,Masayo Nakagawa

地址：Tokyo JP,Tokyo JP,Tokyo JP,Tokyo JP

国籍：JP,JP,JP,JP

代理机构：Oblon, McClelland, Maier & Neustadt, L.L.P.

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