Synchronous PresettableBinary Counter
The MC74AC161/74ACT161 and MC74AC163/74ACT163 are high-speed synchronous modulo-16 binary counters. They are synchronously presettable for application in programmable dividers and have two types of Count Enable inputs plus a Terminal Count output for versatility in forming synchronous multistage counters. The MC74AC161/74ACT161 has an asynchronous Master Reset input that overrides all other inputs and forces the outputs LOW. The MC74AC163/74ACT163 has a Synchronous Reset input that overrides counting and parallel loading and allows the outputs to be simultaneously reset on the rising edge of the clock.•••••
Synchronous Counting and LoadingHigh-Speed Synchronous ExpansionTypical Count Rate of 125 MHzOutputs Source/Sink 24 mA
′ACT161 and ′ACT163 Have TTL Compatible Inputs
VCC16TC15Q014Q113Q212Q311CET10PE91*R2CP3P04P15P26P37CEP8GNDPIN NAMESCEPCETCPMRSRP0–P3PE
Q0–Q3TC
Count Enable Parallel InputCount Enable Trickle InputClock Pulse Input
(′161) Asynchronous Master Reset Input(′163) Synchronous Reset InputParallel Data InputsParallel Enable InputFlip-Flop Outputs
Terminal Count Output
FACT DATA
5-1
元器件交易网www.cecb2b.comMC74AC161 MC74ACT161 MC74AC163 MC74ACT163FUNCTIONAL DESCRIPTIONThe MC74AC161/74ACT161 and MC74AC163/74ACT163count modulo-16 binary sequence. From state 15 (HHHH)they increment to state 0 (LLLL). The clock inputs of allflip-flops are driven in parallel through a clock buffer. Thus allchanges of the Q outputs (except due to Master Reset of the′161) occur as a result of, and synchronous with, theLOW-to-HIGH transition of the CP input signal. The circuitshave four fundamental modes of operation, in order ofprecedence: asynchronous reset (′161), synchronous reset(′163), parallel load, count-up and hold. Five control inputs —Master Reset (MR, ′161), Synchronous Reset (SR, ′163),Parallel Enable (PE), Count Enable Parallel (CEP) and CountEnable Trickle (CET) determine the mode of operation, asshown in the Mode Select Table. A LOW signal on MRoverrides all other inputs and asynchronously forces alloutputs LOW. A LOW signal on SR overrides counting andparallel loading and allows all outputs to go LOW on the nextrising edge of CP. A LOW signal on PE overrides counting andallows information on the Parallel Data (Pn) inputs to be loadedinto the flip-flops on the next rising edge of CP. With PE and MRMODE SELECT TABLE*SRLHHHHPEXLHHHCETXXHLXCEPXXHXLAction on the RisingClock Edge ( )Reset (Clear)Load (Pn → Qn)Count (Increment)No Change (Hold)No Change (Hold)01514131211109(′161) or SR (′163) HIGH, CEP and CET permit counting whenboth are HIGH. Conversely, a LOW signal on either CEP orCET inhibits counting.The MC74AC161/74ACT161 and MC74AC163/74ACT163use D-type edge-triggered flip-flops and changing the SR, PE,CEP and CET inputs when the CP is in either state does notcause errors, provided that the recommended setup and holdtimes, with respect to the rising edge of CP, are observed.The Terminal Count (TC) output is HIGH when CET is HIGHand counter is in state 15. To implement synchronousmultistage counters, the TC outputs can be used with the CEPand CET inputs in two different ways. Please refer to theMC74AC568 data sheet. The TC output is subject to decodingspikes due to internal race conditions and is therefore notrecommended for use as a clock or asynchronous reset forflip-flops, counters or registers.Logic Equations:Count Enable = CEP•CET•PETC = Q0•Q1•Q2•Q3•CETSTATE DIAGRAM12345678*For ′163 onlyH = HIGH Voltage LevelL = LOW Voltage LevelX = ImmaterialLOGIC DIAGRAMP0PE′161CEPCET′163ONLY′163P1P2P3TCCPCP′161ONLYDCDQ0CPCPQDQQ0DETAIL ADETAIL ADETAIL ADETAIL AMR ′161SR ′163Q0Q1Q2Q3Please note that this diagram is provided only for the understanding of logicoperations and should not be used to estimate propagation delays.FACT DATA5-2元器件交易网www.cecb2b.comMC74AC161 MC74ACT161 MC74AC163 MC74ACT163MAXIMUM RATINGS*SymbolVCCVinVoutIinIoutICCTstgParameterDC Supply Voltage (Referenced to GND)DC Input Voltage (Referenced to GND)DC Output Voltage (Referenced to GND)DC Input Current, per PinDC Output Sink/Source Current, per PinDC VCC or GND Current per Output PinStorage TemperatureValue–0.5 to +7.0–0.5 to VCC +0.5–0.5 to VCC +0.5±20±50±50–65 to +150UnitVVVmAmAmA°C*Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the RecommendedOperating Conditions.RECOMMENDED OPERATING CONDITIONSSymbolVCCVin, VoutSupply VoltageDC Input Voltage, Output Voltage (Ref. to GND)Input Rise and Fall Time (Note 1)′AC Devices except Schmitt InputsInput Rise and Fall Time (Note 2)′ACT Devices except Schmitt InputsJunction Temperature (PDIP)Operating Ambient Temperature RangeOutput Current — HighOutput Current — Low–4025VCC @ 3.0 VVCC @ 4.5 VVCC @ 5.5 Vtr, tfTJTAIOHIOLVCC @ 4.5 VVCC @ 5.5 VParameter′AC′ACTMin2.04.501504025108.014085–2424ns/V°C°CmAmAns/VTyp5.05.0Max6.05.5VCCUnitVVtr, tf1. Vin from 30% to 70% VCC; see individual Data Sheets for devices that differ from the typical input rise and fall times.2. Vin from 0.8 V to 2.0 V; see individual Data Sheets for devices that differ from the typical input rise and fall times.FACT DATA5-3元器件交易网www.cecb2b.comMC74AC161 MC74ACT161 MC74AC163 MC74ACT163DC CHARACTERISTICS 74ACSymbol ParameterVCC(V) TA = +25°CTypVIHMinimum High LevelInput VoltageMaximum Low LevelInput VoltageMinimum High LevelOutput Voltage3.04.55.53.04.55.53.04.55.53.04.55.5VOLMaximum Low LevelOutput Voltage3.04.55.53.04.55.5IINIOLDIOHDICCMaximum InputLeakage Current†Minimum DynamicOutput CurrentMaximum QuiescentSupply Current5.55.55.55.58.00.0020.0010.0011.52.252.751.52.252.752.994.495.4974ACTA =–40°C to +85°CUnitConditionsGuaranteed Limits2.13.153.850.91.351.652.94.45.42.563.864.860.10.10.10.360.360.36±0.12.13.153.850.91.351.652.94.45.42.463.764.760.10.10.10.440.440.44±1.075–7580VVOUT = 0.1 Vor VCC – 0.1 VVOUT = 0.1 Vor VCC – 0.1 VIOUT = –50 µAV*VIN = VIL or VIH–12 mAIOH–24 mA–24 mAIOUT = 50 µAV*VIN = VIL or VIH12 mAIOL24 mA24 mAVI = VCC, GNDVOLD = 1.65 V MaxVOHD = 3.85 V MinVIN = VCC or GNDVILVVOHVVµAmAmAµA*All outputs loaded; thresholds on input associated with output under test.†Maximum test duration 2.0 ms, one output loaded at a time.Note: IIN and ICC @ 3.0 V are guaranteed to be less than or equal to the respective limit @ 5.5 V VCC.FACT DATA5-4元器件交易网www.cecb2b.comMC74AC161 MC74ACT161 MC74AC163 MC74ACT163AC CHARACTERISTICS (For Figures and Waveforms — See Section 3) 74AC161SymbolParameterVCC*(V)MinfmaxtPLHtPHLtPLHtPHLtPLHtPHLtPHLtPHLMaximum CountFrequencyPropagation DelayCP to Qn (PE Input HIGH or LOW)Propagation DelayCP to Qn (PE Input HIGH or LOW)Propagation DelayCP to TCPropagation DelayCP to TCPropagation DelayCET to TCPropagation DelayCET to TCPropagation DelayMR to QnPropagation DelayMR to TC3.35.03.35.03.35.03.35.03.35.03.35.03.35.03.35.03.35.0701102.01.51.51.53.02.03.52.02.01.52.52.02.01.53.52.5TA = +25°CCL = 50 pFTyp1111677.05.07.05.09.06.08.56.55.53.56.55.06.05.510.08.512.09.012.09.515.010.514.011.09.56.511.08.512.09.515.013.0Max74AC161TA = –40°Cto +85°CCL = 50 pFMin60951.51.01.51.52.51.52.52.01.51.02.01.51.51.53.02.513.59.513.010.016.511.515.511.511.07.512.59.513.510.017.513.5MaxMHznsnsnsnsnsnsnsns3-33-63-63-63-63-63-63-63-6UnitFig.No.*Voltage Range 3.3 V is 3.3 V ±0.3 V.Voltage Range 5.0 V is 5.0 V ±0.5 V.AC CHARACTERISTICS (For Figures and Waveforms — See Section 3) 74AC163SymbolParameterVCC*(V)MinfmaxtPLHtPHLtPLHtPHLtPLHtPHLMaximum CountFrequencyPropagation DelayCP to Qn (PE Input HIGH or LOW)Propagation DelayCP to Qn (PE Input HIGH or LOW)Propagation DelayCP to TCPropagation DelayCP to TCPropagation DelayCET to TCPropagation DelayCET to TC3.35.03.35.03.35.03.35.03.35.03.35.03.35.0701102.01.51.51.53.02.03.52.02.01.52.52.0TA = +25°CCL = 50 pFTyp951407.55.58.56.09.57.011.08.07.55.58.56.012.59.012.09.515.010.514.011.09.56.511.08.5Max74AC163TA = –40°Cto +85°CCL = 50 pFMin60951.51.01.51.52.51.52.52.01.51.02.01.513.59.513.010.016.511.515.511.511.07.512.59.5MaxMHznsnsnsnsnsns3-33-63-63-63-63-63-6UnitFig.No.*Voltage Range 3.3 V is 3.3 V ±0.3 V.Voltage Range 5.0 V is 5.0 V ±0.5 V.FACT DATA5-5元器件交易网www.cecb2b.comMC74AC161 MC74ACT161 MC74AC163 MC74ACT163AC OPERATING REQUIREMENTS 74AC161SymbolParameterVCC*(V)TyptsthtsthtsthtwtwtwtrecSetup Time, HIGH or LOWPn to CPHold Time, HIGH or LOWPn to CPSetup Time, HIGH or LOWPE to CPHold Time, HIGH or LOWPE to CPSetup Time, HIGH or LOWCEP or CET to CPHold Time, HIGH or LOWCEP or CET to CPClock Pulse Width (Load)HIGH or LOWClock Pulse Width (Count)HIGH or LOWMR Pulse Width, LOWRecovery TImeMR to CP3.35.03.35.03.35.03.35.03.35.03.35.03.35.03.35.03.35.03.35.06.03.5–7.0–4.06.54.0–6.0–3.53.02.0–3.5–2.02.02.02.02.03.02.5–2.0–1.0TA = +25°CCL = 50 pF74AC161TA = –40°Cto +85°CCL = 50 pFUnitFig.No.Guaranteed Minimum13.58.5–1.0011.57.500.56.04.5003.52.54.03.05.54.5–0.5016.010.5–0.5014.08.501.07.05.000.54.03.04.53.57.56.000.5nsnsnsnsnsnsnsnsnsns3-93-93-93-93-93-93-63-63-63-9*Voltage Range 3.3 V is 3.3 V ±0.3 V.Voltage Range 5.0 V is 5.0 V ±0.5 V.FACT DATA5-6元器件交易网www.cecb2b.comMC74AC161 MC74ACT161 MC74AC163 MC74ACT163AC OPERATING REQUIREMENTS 74AC163SymbolParameterVCC*(V)TyptsthtsthtsthtsthtwtwSetup Time, HIGH or LOWPn to CPHold Time, HIGH or LOWPn to CPSetup Time, HIGH or LOWSR to CPHold Time, HIGH or LOWSR to CPSetup Time, HIGH or LOWPE to CPHold Time, HIGH or LOWPE to CPSetup Time, HIGH or LOWCEP or CET to CPHold Time, HIGH or LOWCEP or CET to CPClock Pulse Width (Load)HIGH or LOWClock Pulse Width (Count)HIGH or LOW3.35.03.35.03.35.03.35.03.35.03.35.03.35.03.35.03.35.03.35.05.54.0–7.0–5.05.54.0–7.5–5.55.54.0–7.5–5.03.52.5–4.5–3.03.02.03.02.0TA = +25°CCL = 50 pF74AC163TA = –40°Cto +85°CCL = 50 pFUnitFig.No.Guaranteed Minimum13.58.5–1.00149.5–1.0–0.511.57.5–1.0–0.56.04.5003.52.54.03.016.010.5–0.5016.511.0–0.5014.08.5–0.507.05.000.54.03.04.53.5nsnsnsnsnsnsnsnsnsns3-93-93-93-93-93-93-93-93-63-6*Voltage Range 3.3 V is 3.3 V ±0.3 V.Voltage Range 5.0 V is 5.0 V ±0.5 V.FACT DATA5-7元器件交易网www.cecb2b.comMC74AC161 MC74ACT161 MC74AC163 MC74ACT163DC CHARACTERISTICS 74ACTSymbol ParameterVCC(V) TA = +25°CTypVIHVILVOHMinimum High LevelInput VoltageMaximum Low LevelInput VoltageMinimum High LevelOutput Voltage4.55.54.55.54.55.54.55.5VOLMaximum Low LevelOutput Voltage4.55.54.55.5IIN∆ICCTIOLDIOHDICCMaximum InputLeakage CurrentAdditional Max. ICC/Input†Minimum DynamicOutput CurrentMaximum QuiescentSupply Current5.55.55.55.55.58.00.60.0010.0011.51.51.51.54.495.4974ACTTA =–40°C to +85°CUnitConditionsGuaranteed Limits2.02.00.80.84.45.43.864.860.10.10.360.36±0.12.02.00.80.84.45.43.764.760.10.10.440.44±1.01.575–7580VVVVOUT = 0.1 Vor VCC – 0.1 VVOUT = 0.1 Vor VCC – 0.1 VIOUT = –50 µA*VIN = VIL or VIH–24 mAIOH–24 mAIOUT = 50 µA*VIN = VIL or VIH24 mAIOL24 mAVI = VCC, GNDVI = VCC –2.1 VVOLD = 1.65 V MaxVOHD = 3.85 V MinVIN = VCC or GNDVVVµAmAmAmAµA*All outputs loaded; thresholds on input associated with output under test.†Maximum test duration 2.0 ms, one output loaded at a time.FACT DATA5-8元器件交易网www.cecb2b.comMC74AC161 MC74ACT161 MC74AC163 MC74ACT163AC CHARACTERISTICS (For Figures and Waveforms — See Section 3) 74ACT161SymbolParameterVCC*(V)MinfmaxtPLHtPHLtPLHtPHLtPLHtPHLtPHLtPHLMaximum CountFrequencyPropagation DelayCP to Qn (PE Input HIGH or LOW)Propagation DelayCP or Qn (PE Input HIGH or LOW)Propagation DelayCP to TCPropagation DelayCP to TCPropagation DelayCET to TCPropagation DelayCET to TCPropagation DelayMR to QnPropagation DelayMR to TC5.05.05.05.05.05.05.05.05.01151.51.52.01.51.51.51.52.5TA = +25°CCL = 50 pFTyp1258.08.011.011.07.58.08.010.09.510.511.012.58.59.510.013.5Max74ACT161TA = –40°Cto +85°CCL = 50 pFMin1001.51.51.51.51.51.51.52.010.511.512.513.510.010.511.014.5MaxMHznsnsnsnsnsnsnsns3-33-63-63-63-63-63-63-63-6UnitFig.No.*Voltage Range 5.0 V is 5.0 V ±0.5 V.AC CHARACTERISTICS (For Figures and Waveforms — See Section 3) 74ACT163SymbolParameterVCC*(V)MinfmaxtPLHtPHLtPLHtPHLtPLHtPHLMaximum CountFrequencyPropagation DelayCP to Qn (PE Input HIGH or LOW)Propagation DelayCP to Qn (PE Input HIGH or LOW)Propagation DelayCP to TCPropagation DelayCP to TCPropagation DelayCET to TCPropagation DelayCET to TC5.05.05.05.05.05.05.01201.51.52.53.02.02.0TA = +25°CCL = 50 pFTyp1405.56.07.08.05.56.010.011.011.513.59.010.0Max74ACT163TA = –40°Cto +85°CCL = 50 pFMin1051.51.52.02.01.52.011.012.013.515.010.511.0MaxMHznsnsnsnsnsns3-33-63-63-63-63-63-6UnitFig.No.*Voltage Range 5.0 V is 5.0 V ±0.5 V.FACT DATA5-9元器件交易网www.cecb2b.comMC74AC161 MC74ACT161 MC74AC163 MC74ACT163AC OPERATING REQUIREMENTS 74ACT161SymbolParameterVCC*(V)TyptsthtsthtsthtwtwtwtrecSetup Time, HIGH or LOWPn to CPHold Time, HIGH or LOWPn to CPSetup Time, HIGH or LOWPE to CPHold Time, HIGH or LOWPE to CPSetup Time, HIGH or LOWCEP or CET to CPHold Time, HIGH or LOWCEP or CET to CPClock Pulse Width (Load)HIGH or LOWClock Pulse Width (Count)HIGH or LOWMR Pulse Width, LOWRecovery TimeMR to CP5.05.05.05.05.05.05.05.05.05.07.0–3.06.0–3.54.0–2.02.02.03.00TA = +25°CCL = 50 pF74ACT161TA = –40°Cto +85°CCL = 50 pFUnitFig.No.Guaranteed Minimum9.508.5–0.55.503.03.03.0011.509.5–0.56.503.53.57.50.5nsnsnsnsnsnsnsnsnsns3-93-93-93-93-93-93-63-63-63-9*Voltage Range 5.0 V is 5.0 V ±0.5 V.FACT DATA5-10元器件交易网www.cecb2b.comMC74AC161 MC74ACT161 MC74AC163 MC74ACT163AC OPERATING REQUIREMENTS 74ACT163SymbolParameterVCC*(V)TyptsthtsthtsthtsthtwtwSetup Time, HIGH or LOWPn to CPHold Time, HIGH or LOWPn to CPSetup Time, HIGH or LOWSR to CPHold Time, HIGH or LOWSR to CPSetup Time, HIGH or LOWPE to CPHold Time, HIGH or LOWPE to CPSetup Time, HIGH or LOWCEP or CET to CPHold Time, HIGH or LOWCEP or CET to CPClock Pulse WidthHIGH or LOWClock Pulse Width (Count)HIGH or LOW5.05.05.05.05.05.05.05.05.05.04.0–5.04.0–5.54.0–5.52.5–3.02.02.0TA = +25°CCL = 50 pF74ACT163TA = –40°Cto +85°CCL = 50 pFUnitFig.No.Guaranteed Minimum10.00.510.0–0.58.5–0.55.503.53.512.00.511.5–0.510.506.50.53.53.5nsnsnsnsnsnsnsnsnsns3-93-93-93-93-93-93-93-93-63-6*Voltage Range 5.0 V is 5.0 V ±0.5 V.CAPACITANCESymbolCINCPDInput CapacitancePower Dissipation CapacitanceParameterValueTyp4.545UnitpFpFTest Conditions VCC = 5.0 V VCC = 5.0 VFACT DATA5-11元器件交易网www.cecb2b.comMC74AC161 MC74ACT161 MC74AC163 MC74ACT163OUTLINE DIMENSIONSN SUFFIXPLASTIC DIP PACKAGECASE 648–08ISSUE R9–A–16B18NOTES:1.DIMENSIONING AND TOLERANCING PER ANSIY14.5M, 1982.2.CONTROLLING DIMENSION: INCH.3.DIMENSION L TO CENTER OF LEADS WHENFORMED PARALLEL.4.DIMENSION B DOES NOT INCLUDE MOLD FLASH.5.ROUNDED CORNERS OPTIONAL.DIMABCDFGHJKLMSINCHESMINMAX0.7400.7700.2500.2700.1450.1750.0150.0210.0400.700.100 BSC0.050 BSC0.0080.0150.1100.1300.2950.3050 _10 _0.0200.040MILLIMETERSMINMAX18.8019.556.356.853.694.440.390.531.021.772.54 BSC1.27 BSC0.210.382.803.307.507.740 _10 _0.511.01FSCL–T–HKGD16 PLSEATINGPLANEJTAMM0.25 (0.010)M–A–D SUFFIXPLASTIC SOIC PACKAGECASE 751B–05ISSUE J916–B–18P8 PL0.25 (0.010)MBSGFNOTES:1.DIMENSIONING AND TOLERANCING PERANSI Y14.5M, 1982.2.CONTROLLING DIMENSION: MILLIMETER.3.DIMENSIONS A AND B DO NOT INCLUDEMOLD PROTRUSION.4.MAXIMUM MOLD PROTRUSION 0.15 (0.006)PER SIDE.5.DIMENSION D DOES NOT INCLUDE DAMBARPROTRUSION. ALLOWABLE DAMBARPROTRUSION SHALL BE 0.127 (0.005) TOTALIN EXCESS OF THE D DIMENSION ATMAXIMUM MATERIAL CONDITION.MILLIMETERSMINMAX9.8010.003.804.001.351.750.350.490.401.251.27 BSC0.190.250.100.250 7 __5.806.200.250.50INCHESMINMAX0.3860.3930.1500.1570.0540.0680.0140.0190.0160.0490.050 BSC0.0080.0090.0040.0090 7 __0.2290.2440.0100.019KC–T–SEATINGPLANERX 45_MD16 PLMJ0.25 (0.010)TBSASDIMABCDFGJKMPRMotorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regardingthe suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, andspecifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters can and do vary in differentapplications. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. Motorola doesnot convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components insystems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure ofthe Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any suchunintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmlessagainst all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or deathassociated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part.Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer.How to reach us:USA/EUROPE: Motorola Literature Distribution; P.O. Box 20912; Phoenix, Arizona 85036. 1–800–441–2447MFAX: RMFAX0@email.sps.mot.com –TOUCHTONE (602) 244–6609INTERNET: http://Design–NET.comJAPAN: Nippon Motorola Ltd.; Tatsumi–SPD–JLDC, Toshikatsu Otsuki, 6F Seibu–Butsuryu–Center, 3–14–2 Tatsumi Koto–Ku, Tokyo 135, Japan. 03–3521–8315HONG KONG: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park, 51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852–26629298◊FACT DATA5-12*MC74AC161/D*MC74AC161/D
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