A delay circuit and method

专利名称：A delay circuit and method

发明人：Phillips, William A.,Paparo, Mario,Capocelli,

Piero

申请号：EP963020.9申请日：19960326公开号：EP07353A2公开日：19961002

专利附图：

摘要：A reduced area delay circuit (40) and method are disclosed. The delay circuituses a constant current source and a constant current drain to charge and discharge acapacitor (56) and thus control the delay time of the delay circuit. The constant current

source and drain can be implemented using current mirrors formed by configuringMOSFET transistors (42,46,52,) in a common source configuration. The delay circuitmethod includes the steps of receiving an input signal, delaying the input signal by usinga constant current source or drain in combination with a capacitor (56), and then bufferingthe voltage on the capacitor using two inverters (58,60;62,). A programmable delaycircuit is also disclosed by adding additional pairs of current mirrors to the delay circuitand selectively enabling the pairs to adjust the delay time.

申请人：SGS-THOMSON MICROELECTRONICS, INC.

地址：1310 Electronics Drive Carrollton Texas 75006-5039 US

国籍：US

代理机构：Palmer, Roger

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