专利名称:Variable delay circuit and delay amount
control method
发明人:Hiroyuki Matsunami申请号:US12342780申请日:20081223公开号:US07834673B2公开日:20101116
专利附图:
摘要:A variable delay circuit comprising a first delay element configured to delay aninput signal, a second delay element coupled to the first delay element in parallel andalso configured to delay the input signal, a control current supply section configured to
supply control currents for adjusting a delay amount of the first delay element and adelay amount of the second delay element, and an output signal selecting sectionconfigured to select any one of an output signal from the first delay element and anoutput signal from the second delay element according to a selecting signal for selectingdelay time of the input signal.
申请人:Hiroyuki Matsunami
地址:Kasugai JP
国籍:JP
代理机构:Fujitsu Patent Center
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