Semiconductor wafer level chip package and method

专利名称：Semiconductor wafer level chip package and

method of manufacturing the same

发明人：Goon-Woo Kim,Man-Hee Han,Jae-Hong

Kim,Heui-Seog Kim,Sang-Jun Kim,Wha-Su Sin

申请号：US11431084申请日：20060510

公开号：US20070052094A1公开日：20070308

专利附图：

摘要：A semiconductor chip package may include one or more conductive patternsprovided on a front surface of a wafer. An encapsulation layer may cover at least the

front surface of the wafer. Chip plugs may be electrically connected to the conductivepatterns, and may be embedded in a rear surface of the wafer. External connectionterminals may be electrically connected to the chip plugs, and may be provided on therear surface of the wafer.

申请人：Goon-Woo Kim,Man-Hee Han,Jae-Hong Kim,Heui-Seog Kim,Sang-Jun Kim,Wha-Su Sin

地址：Cheonan-si KR,Cheonan-si KR,Cheonan-si KR,Cheonan-si KR,Cheonan-siKR,Cheonan-si KR

国籍：KR,KR,KR,KR,KR,KR

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