DS90LV049HHighTemperature3VLVDSDualLineDriverandReceiverPairSeptember2005
DS90LV049H
HighTemperature3VLVDSDualLineDriverandReceiverPair
GeneralDescription
TheDS90LV049HisadualCMOSflow-throughdifferentiallinedriver-receiverpairdesignedforapplicationsrequiringultralowpowerdissipation,exceptionalnoiseimmunity,andhighdatathroughput.Thedeviceisdesignedtosupportdataratesinexcessof400MbpsutilizingLowVoltageDifferentialSignaling(LVDS)technology.
TheDS90LV049HdriversacceptLVTTL/LVCMOSsignalsandtranslatethemtoLVDSsignals.ThereceiversacceptLVDSsignalsandtranslatethemto3VCMOSsignals.TheLVDSinputbuffershaveinternalfailsafebiasingthatplacestheoutputstoaknownH(high)stateforfloatingreceiverinputs.Inaddition,theDS90LV049HsupportsaTRI-STATEfunctionforalowidlepowerstatewhenthedeviceisnotinuse.
TheENandENinputsareANDedtogetherandcontroltheTRI-STATEoutputs.Theenablesarecommontoallfourgates.
Features
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HighTemperature+125˚COperatingRangeUpto400Mbpsswitchingrates
Flow-throughpinoutsimplifiesPCBlayout50pstypicaldriverchannel-to-channelskew50pstypicalreceiverchannel-to-channelskew3.3VsinglepowersupplydesignTRI-STATEoutputcontrol
Internalfail-safebiasingofreceiverinputsLowpowerdissipation(70mWat3.3Vstatic)HighimpedanceonLVDSoutputsonpowerdownConformstoTIA/EIA-644-ALVDSStandardAvailableinlowprofile16pinTSSOPpackage
ConnectionDiagram
Dual-In-Line
FunctionalDiagram
20161701
OrderNumberDS90LV049HMT
OrderNumberDS90LV049HMTX(TapeandReel)
SeeNSPackageNumberMTC16
20161702
TruthTable
ENLorOpen
HLorOpen
H
ENLorOpenLorOpen
HH
LVDSOutOFFONOFFOFF
LVCMOSOut
OFFONOFFOFF
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DS90LV049HAbsoluteMaximumRatings(Note1)
IfMilitary/Aerospacespecifieddevicesarerequired,pleasecontacttheNationalSemiconductorSalesOffice/Distributorsforavailabilityandspecifications.SupplyVoltage(VDD)LVCMOSInputVoltage(DIN)LVDSInputVoltage(RIN+,RIN-)EnableInputVoltage(EN,EN)LVCMOSOutputVoltage(ROUT)LVDSOutputVoltage(DOUT+,DOUT-)
LVCMOSOutputShortCircuitCurrent(ROUT)
LVDSOutputShortCircuitCurrent(DOUT+,DOUT−)LVDSOutputShortCircuitCurrentDuration(DOUT+,DOUT−)StorageTemperatureRange
Continuous−65˚Cto+150˚C
24mA100mA
−0.3Vto+4V
−0.3Vto(VDD+0.3V)
−0.3Vto+3.9V
−0.3Vto(VDD+0.3V)−0.3Vto(VDD+0.3V)
−0.3Vto+3.9V
LeadTemperatureRangeSoldering(4sec.)
MaximumJunctionTemperature
MaximumPackagePowerDissipation@+25˚CMTCPackageDerateMTCPackageESDRating
(HBM,1.5kΩ,100pF)(MM,0Ω,200pF)
≥7kV≥250V866mW
6.9mW/˚Cabove+25˚C
+260˚C+150˚C
RecommendedOperatingConditions
Min
SupplyVoltage(VDD)OperatingFreeAirTemperature(TA)
−40
+25
+125
˚C
+3.0
Typ+3.3
Max+3.6
UnitsV
ElectricalCharacteristics
Oversupplyvoltageandoperatingtemperatureranges,unlessotherwisespecified.(Notes2,4,6)SymbolVIHVILIIHIILVCL|VOD|∆VODVOS∆VOSIOSParameter
InputHighVoltageInputLowVoltageInputHighCurrentInputLowCurrentInputClampVoltageDifferentialOutputVoltageChangeinMagnitudeofVODforComplementaryOutputStatesOffsetVoltage
ChangeinMagnitudeofVOSforComplementaryOutputStatesOutputShortCircuitCurrent(Note14)
DifferentialOutputShortCircuitCurrent(Note14)Power-offLeakageOutputTRI-STATECurrent
ENABLED,
DIN=VDD,DOUT+=0VorDIN=GND,DOUT−=0VENABLED,VOD=0VVOUT=0Vor3.6VVDD=0VorOpenEN=0VandEN=VDDVOUT=0VorVDDVCM=1.2V,0.05V,2.35V
-100
VID=100mV,VDD=3.3VVDD=3.6V
VIN=0Vor2.8VVDD=0V
VIN=0Vor2.8Vor3.6V
RIN+RIN-0.05−12−10−20−10
DOUT−DOUT+RL=100Ω(Figure1)VIN=VDDVIN=GNDICL=−18mA
DINENENConditions
Pin
Min2.0GND−10−10−1.5250
1−0.1−0.63501
1.125
1.231−5.8
450351.37525−9.0
Typ
MaxVDD0.8+10+10
UnitsVVµAµAVmV|mV|V|mV|mA
LVCMOSInputDCSpecifications(DriverInputs,ENABLEPins)
LVDSOutputDCSpecifications(DriverOutputs)
IOSDIOFFIOZ−5.8−9.0+20+10
mAµAµA
±1±1
LVDSInputDCSpecifications(ReceiverInputs)VTHVTLVCMRDifferentialInputHighThresholdDifferentialInputLowThresholdCommon-ModeVoltageRange
−15−15
335
mVmVVµAµA
±4±1
+12+10
IINInputCurrent
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DS90LV049HElectricalCharacteristics
SymbolVOHVOLIOZIDDIDDZParameter
OutputHighVoltageOutputLowVoltageOutputTRI-STATECurrentPowerSupplyCurrent(Note3)TRI-StateSupplyCurrent
(Continued)
Oversupplyvoltageandoperatingtemperatureranges,unlessotherwisespecified.(Notes2,4,6)
Conditions
IOH=-0.4mA,VID=200mVIOL=2mA,VID=200mVDisabled,VOUT=0VorVDDEN=3.3VEN=0V
ROUT-10
Pin
Min2.7
Typ3.30.05
0.25+103525Max
UnitsVVµAmAmA
LVCMOSOutputDCSpecifications(ReceiverOutputs)
±1
2115
GeneralDCSpecifications
VDDSwitchingCharacteristics
VDD=+3.3V±10%,TA=−40˚Cto+125˚C(Notes4,13)SymboltPHLDtPLHDtSKD1tSKD2tSKD3tTLHtTHLtPHZtPLZtPZHtPZLfMAXtPHLtPLHtSK1tSK2tSK3tTLHtTHLtPHZtPLZtPZHtPZLfMAXParameter
DifferentialPropagationDelayHightoLowDifferentialPropagationDelayLowtoHighDifferentialPulseSkew|tPHLD−tPLHD|(Notes5,7)
DifferentialChannel-to-ChannelSkew(Notes5,8)
DifferentialPart-to-PartSkew(Notes5,9)RiseTime(Note5)FallTime(Note5)DisableTimeHightoZDisableTimeLowtoZEnableTimeZtoHighEnableTimeZtoLow
MaximumOperatingFrequency(Note16)PropagationDelayHightoLowPropagationDelayLowtoHighPulseSkew|tPHL−tPLH|(Note10)Channel-to-ChannelSkew(Note11)Part-to-PartSkew(Note12)RiseTime(Note5)FallTime(Note5)DisableTimeHightoZDisableTimeLowtoZEnableTimeZtoHighEnableTimeZtoLow
MaximumOperatingFrequency(Note17)
(Figure8andFigure9)(Figure6andFigure7)RL=100Ω
(Figure4andFigure5)
112000.50.50000.30.3332.52.5200
0.90.755.65.44.64.6250
0
RL=100Ω
(Figure2andFigure3)
000.20.2
0.40.41.51.533250220.050.05
3.53.50.40.51.01.41.48877
Conditions
Min
Typ0.70.70.050.05
Max220.40.51.0113366
UnitsnsnsnsnsnsnsnsnsnsnsnsMHznsnsnsnsnsnsnsnsnsnsnsMHz
LVDSOutputs(DriverOutputs)
LVCMOSOutputs(ReceiverOutputs)
Note1:“AbsoluteMaximumRatings”arethosevaluesbeyondwhichthesafetyofthedevicecannotbeguaranteed.Theyarenotmeanttoimplythatthedevicesshouldbeoperatedattheselimits.Thetableof“ElectricalCharacteristics”specifiesconditionsofdeviceoperation.
Note2:Currentintodevicepinsisdefinedaspositive.Currentoutofdevicepinsisdefinedasnegative.Allvoltagesarereferencedtogroundexcept:VTH,VTL,VODand∆VOD.
Note3:Both,driverandreceiverinputsarestatic.AllLVDSoutputshave100Ωload.AllLVCMOSoutputsarefloating.Noneoftheoutputshaveanylumpedcapacitiveload.
Note4:Alltypicalvaluesaregivenfor:VDD=+3.3V,TA=+25˚C.
Note5:Theseparametersareguaranteedbydesign.ThelimitsarebasedonstatisticalanalysisofthedeviceperformanceoverPVT(process,voltage,temperature)ranges.
Note6:TheDS90LV049H’sdriversarecurrentmodedevicesandonlyfunctionwithindatasheetspecificationswhenaresistiveloadisappliedtotheiroutputs.Thetypicalrangeoftheresistorvaluesis90Ωto110Ω.
Note7:tSKD1ordifferentialpulseskewisdefinedas|tPHLD−tPLHD|.Itisthemagnitudedifferenceinthedifferentialpropagationdelaysbetweenthepositivegoingedgeandthenegativegoingedgeofthesamedriverchannel.
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DS90LV049HSwitchingCharacteristics
(Continued)
Note8:tSKD2ordifferentialchannel-to-channelskewisdefinedasthemagnitudedifferenceinthedifferentialpropagationdelaysbetweentwodriverchannelsonthesamedevice.
Note9:tSKD3ordifferentialpart-to-partskewisdefinedas|tPLHDMax−tPLHDMin|or|tPHLDMax−tPHLDMin|.Itisthedifferencebetweentheminimumandmaximumspecifieddifferentialpropagationdelays.ThisspecificationappliestodevicesatthesameVDDandwithin5˚Cofeachotherwithintheoperatingtemperaturerange.Note10:tSK1orpulseskewisdefinedas|tPHL−tPLH|.Itisthemagnitudedifferenceinthepropagationdelaysbetweenthepositivegoingedgeandthenegativegoingedgeofthesamereceiverchannel.
Note11:tSK2orchannel-to-channelskewisdefinedasthemagnitudedifferenceinthepropagationdelaysbetweentworeceiverchannelsonthesamedevice.Note12:tSK3orpart-to-partskewisdefinedas|tPLHMax−tPLHMin|or|tPHLMax−tPHLMin|.Itisthedifferencebetweentheminimumandmaximumspecifiedpropagationdelays.ThisspecificationappliestodevicesatthesameVDDandwithin5˚Cofeachotherwithintheoperatingtemperaturerange.Note13:Generatorwaveformforalltestsunlessotherwisespecified:f=1MHz,ZO=50Ω,tr≤1ns,andtf≤1ns.Note14:Outputshortcircuitcurrent(IOS)isspecifiedasmagnitudeonly,minussignindicatesdirectiononly.Note15:Allinputvoltagesareforonechannelunlessotherwisespecified.OtherinputsaresettoGND.
Note16:fMAXgeneratorinputconditions:tr=tf<1ns(0%to100%),50%dutycycle,0Vto3V.OutputCriteria:dutycycle=45%/55%,VOD>250mV,allchannelsswitching.
Note17:fMAXgeneratorinputconditions:tr=tf<1ns(0%to100%),50%dutycycle,VID=200mV,VCM=1.2V.OutputCriteria:dutycycle=45%/55%,VOH>2.7V,VOL<0.25V,allchannelsswitching.
ParameterMeasurementInformation
20161703
FIGURE1.DriverVODandVOSTestCircuit
20161704
FIGURE2.DriverPropagationDelayandTransitionTimeTestCircuit
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DS90LV049HParameterMeasurementInformation
(Continued)
20161705
FIGURE3.DriverPropagationDelayandTransitionTimeWaveforms
20161706
FIGURE4.DriverTRI-STATEDelayTestCircuit
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DS90LV049HParameterMeasurementInformation
(Continued)
20161707
FIGURE5.DriverTRI-STATEDelayWaveform
20161709
FIGURE6.ReceiverPropagationDelayandTransitionTimeTestCircuit
20161710
FIGURE7.ReceiverPropagationDelayandTransitionTimeWaveforms
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DS90LV049HParameterMeasurementInformation
(Continued)
20161711
FIGURE8.ReceiverTRI-STATEDelayTestCircuit
20161714
FIGURE9.ReceiverTRI-STATEDelayWaveforms
TypicalApplication
20161708
FIGURE10.Point-to-PointApplication
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DS90LV049HApplicationsInformation
GeneralapplicationguidelinesandhintsforLVDSdriversandreceiversmaybefoundinthefollowingapplicationnotes:LVDSOwner’sManual(lit#550062-003),AN-805,AN-808,AN-903,AN-916,AN-971,AN-977.
LVDSdriversandreceiversareintendedtobeprimarilyusedinanuncomplicatedpoint-to-pointconfigurationasisshowninFigure10.Thisconfigurationprovidesacleansignalingenvironmentforthefastedgeratesofthedrivers.There-ceiverisconnectedtothedriverthroughabalancedmediawhichmaybeastandardtwistedpaircable,aparallelpaircable,orsimplyPCBtraces.Typically,thecharacteristicdifferentialimpedanceofthemediaisintherangeof100Ω.Aterminationresistorof100Ω(selectedtomatchtheme-dia),andislocatedasclosetothereceiverinputpinsaspossible.Theterminationresistorconvertsthedriveroutputcurrent(currentmode)intoavoltagethatisdetectedbythereceiver.Otherconfigurationsarepossiblesuchasamulti-receiverconfiguration,buttheeffectsofamid-streamcon-nector(s),cablestub(s),andotherimpedancediscontinuitiesaswellasgroundshifting,noisemarginlimits,andtotalterminationloadingmustbetakenintoaccount.
TheTRI-STATEfunctionallowsthedeviceoutputstobedisabled,thusobtaininganevenlowerpowerstatewhenthetransmissionofdataisnotrequired.
TheDS90LV049Hhasaflow-throughpinoutthatallowsforeasyPCBlayout.TheLVDSsignalsononesideofthedeviceeasilyallowsformatchingelectricallengthsofthedifferentialpairtracelinesbetweenthedriverandthere-ceiveraswellasallowingthetracelinestobeclosetogethertocouplenoiseascommon-mode.NoiseisolationisachievedwiththeLVDSsignalsononesideofthedeviceandtheTTLsignalsontheotherside.
POWERDECOUPLINGRECOMMENDATIONS
Bypasscapacitorsmustbeusedonpowerpins.Usehighfrequencyceramic(surfacemountisrecommended)0.1µFand0.001µFcapacitorsinparallelatthepowersupplypinwiththesmallestvaluecapacitorclosesttothedevicesupplypin.Additionalscatteredcapacitorsovertheprintedcircuitboardwillimprovedecoupling.Multipleviasshouldbeusedtoconnectthedecouplingcapacitorstothepowerplanes.A10µF(35V)orgreatersolidtantalumcapacitorshouldbeconnectedatthepowerentrypointontheprintedcircuitboardbetweenthesupplyandground.
PCBOARDCONSIDERATIONS
Useatleast4PCBlayers(toptobottom);LVDSsignals,ground,power,TTLsignals.
IsolateTTLsignalsfromLVDSsignals,otherwisetheTTLmaycoupleontotheLVDSlines.ItisbesttoputTTLandLVDSsignalsondifferentlayerswhichareisolatedbyapower/groundplane(s).
Keepdriversandreceiversasclosetothe(LVDSportside)connectorsaspossible.
DIFFERENTIALTRACES
Usecontrolledimpedancetraceswhichmatchthedifferen-tialimpedanceofyourtransmissionmedium(i.e.cable)andterminationresistor.RunthedifferentialpairtracelinesasclosetogetheraspossibleassoonastheyleavetheIC(stubsshouldbe<10mmlong).Thiswillhelpeliminatereflectionsandensurenoiseiscoupledascommon-mode.Infact,wehaveseenthatdifferentialsignalswhichare1mmapartradiatefarlessnoisethantraces3mmapartsince
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magneticfieldcancellationismuchbetterwiththeclosertraces.Inaddition,noiseinducedonthedifferentiallinesismuchmorelikelytoappearascommon-modewhichisre-jectedbythereceiver.
Matchelectricallengthsbetweentracestoreduceskew.Skewbetweenthesignalsofapairmeansaphasediffer-encebetweensignalswhichdestroysthemagneticfieldcancellationbenefitsofdifferentialsignalsandEMIwillre-sult.(Notethevelocityofpropagation,v=c/Erwherec(thespeedoflight)=0.2997mm/psor0.0118in/ps).Donotrelysolelyontheautoroutefunctionfordifferentialtraces.Care-fullyreviewdimensionstomatchdifferentialimpedanceandprovideisolationforthedifferentiallines.Minimizethenum-berorviasandotherdiscontinuitiesontheline.
Avoid90˚turns(thesecauseimpedancediscontinuities).Usearcsor45˚bevels.
Withinapairoftraces,thedistancebetweenthetwotracesshouldbeminimizedtomaintaincommon-moderejectionofthereceivers.Ontheprintedcircuitboard,thisdistanceshouldremainconstanttoavoiddiscontinuitiesindifferentialimpedance.Minorviolationsatconnectionpointsareallow-able.
TERMINATION
Useaterminationresistorwhichbestmatchesthedifferen-tialimpedanceoryourtransmissionline.Theresistorshouldbebetween90Ωand130Ω.Rememberthatthecurrentmodeoutputsneedtheterminationresistortogeneratethedifferentialvoltage.LVDSwillnotworkwithoutresistorter-mination.Typically,connectingasingleresistoracrossthepairatthereceiverendwillsuffice.
Surfacemount1%to2%resistorsarebest.PCBstubs,componentlead,andthedistancefromtheterminationtothereceiverinputsshouldbeminimized.Thedistancebetweentheterminationresistorandthereceivershouldbe<10mm(12mmMAX).
PROBINGLVDSTRANSMISSIONLINES
Alwaysusehighimpedance(>100kΩ),lowcapacitance(<2pF)scopeprobeswithawidebandwidth(1GHz)scope.Improperprobingwillgivedeceivingresults.CABLESANDCONNECTORS,GENERALCOMMENTSWhenchoosingcableandconnectorsforLVDSitisimpor-tanttoremember:
Usecontrolledimpedancemedia.Thecablesandconnec-torsyouuseshouldhaveamatcheddifferentialimpedanceofabout100Ω.Theyshouldnotintroducemajorimpedancediscontinuities.
Balancedcables(e.g.twistedpair)areusuallybetterthanunbalancedcables(ribboncable,simplecoax.)fornoisereductionandsignalquality.Balancedcablestendtogener-atelessEMIduetofieldcancelingeffectsandalsotendtopickupelectromagneticradiationacommon-mode(notdif-ferentialmode)noisewhichisrejectedbythereceiver.FAIL-SAFEFEATURE
AnLVDSreceiverisahighgain,highspeeddevicethatamplifiesasmalldifferentialsignal(20mV)toCMOSlogiclevels.Duetothehighgainandtightthresholdofthere-ceiver,careshouldbetakentopreventnoisefromappearingasavalidsignal.
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DS90LV049HApplicationsInformation
(Continued)
Thereceiver’sinternalfail-safecircuitryisdesignedtosource/sinkasmallamountofcurrent,providingfail-safeprotection(astableknownstateofHIGHoutputvoltage)forfloatingreceiverinputs.
TheDS90LV049Hhastworeceivers,andifanapplicationrequiresasinglereceiver,theunusedreceiverinputsshouldbeleftOPEN.Donottieunusedreceiverinputstogroundoranyothervoltages.TheinputisbiasedbyinternalhighvaluepullupandpulldowncurrentsourcestosettheoutputtoaHIGHstate.ThisinternalcircuitrywillguaranteeaHIGH,stableoutputstateforopeninputs.
Externallowervaluepullupandpulldownresistors(forastrongerbias)maybeusedtoboostfail-safeinthepresenceofhighernoiselevels.Thepullupandpulldownresistorsshouldbeinthe5kΩto15kΩrangetominimizeloadingandwaveformdistortiontothedriver.Thecommon-modebiaspointshouldbesettoapproximately1.2V(lessthan1.75V)tobecompatiblewiththeinternalcircuitry.
FormoreinformationonfailsfebiasingofLVDSinterfacespleaserefertoAN-1194.
PinDescriptions
PinNo.10,116,75,82,31,414,159,161213
NameDINDOUT+DOUT−RIN+RIN-ROUTEN,ENVDDGND
Description
Driverinputpins,LVCMOSlevels.Thereisapull-downcurrentsourcepresent.
Non-invertingdriveroutputpins,LVDSlevels.Invertingdriveroutputpins,LVDSlevels.
Non-invertingreceiverinputpins,LVDSlevels.Thereisapull-upcurrentsourcepresent.
Invertingreceiverinputpins,LVDSlevels.Thereisapull-downcurrentsourcepresent.
Receiveroutputpins,LVCMOSlevels.
EnableandDisablepins.Therearepull-downcurrentsourcespresentatbothpins.Powersupplypin.Groundpin.
TypicalPerformanceCurves
DifferentialOutputVoltage
vsLoadResistor
PowerSupplyCurrent
vsFrequency
2016171920161721
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DS90LV049HHighTemperature3VLVDSDualLineDriverandReceiverPairPhysicalDimensions
inches(millimeters)unlessotherwisenoted
16-Lead(0.100\"Wide)MoldedThinShrinkSmallOutlinePackage,JEDEC
OrderNumberDS90LV049HMT
OrderNumberDS90LV049HMTX(TapeandReel)
NSPackageNumberMTC16
Nationaldoesnotassumeanyresponsibilityforuseofanycircuitrydescribed,nocircuitpatentlicensesareimpliedandNationalreservestherightatanytimewithoutnoticetochangesaidcircuitryandspecifications.Forthemostcurrentproductinformationvisitusatwww.national.com.LIFESUPPORTPOLICY
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