Structural testing of integrated circuits

专利名称：Structural testing of integrated circuits发明人：Anurag Jindal,Nipun Mahajan申请号：US14514402申请日：20141015公开号：US09599673B2公开日：20170321

专利附图：

摘要：An integrated circuit (IC) that is operable in scan test and functional modesincludes scan-in pads, scan-out pads, scan chains, a compressor, a decompressor, a testcontrol register, and a scan controller. The scan controller includes a multiple input shiftregister (MISR), an inverter, and multiple logic gates. The scan-in and scan-out pads

receive scan test data and masking signals, respectively. The decompressor providesdecompressed scan test data to the scan chains, which generate functional responsesbased on the decompressed scan test data. The compressor provides compressedfunctional responses to the scan controller. The logic gates receive the compressedfunctional responses and the masking signals from the compressor and the

corresponding scan-out pads, respectively, and generate corresponding masked signals.The masking signals mask non-deterministic values in the decompressed functionalresponses. The MISR receives the masked signals and generates an error free signature.

申请人：Anurag Jindal,Nipun Mahajan

地址：Patiala IN,New Delhi IN

国籍：IN,IN

代理人：Charles E. Bergere

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