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HCPL-4504中文版说明书

来源:爱go旅游网
HCPL-4504/J454/0454, HCNW4504

High CMR, High Speed Optocouplers

Data Sheet

Lead (Pb) FreeRoHS 6 fullycompliantRoHS 6 fully compliant options available;-xxxE denotes a lead-free productDescription

The󰀠HCPL-4504󰀠and󰀠HCPL-0454󰀠contain󰀠a󰀠GaAsP󰀠LED󰀠while󰀠the󰀠HCPL-J454󰀠and󰀠HCNW4504󰀠contain󰀠an󰀠AlGaAs󰀠LED.󰀠The󰀠LED󰀠is󰀠optically󰀠coupled󰀠to󰀠an󰀠integrated󰀠high󰀠gain󰀠photo󰀠detector.

The󰀠HCPL-4504󰀠series󰀠has󰀠short󰀠propagation󰀠delays󰀠and󰀠high󰀠CTR.󰀠The󰀠HCPL-4504󰀠series󰀠also󰀠has󰀠a󰀠guaranteed󰀠propagation󰀠delay󰀠difference󰀠(tPLH-tPHL).󰀠These󰀠features󰀠make󰀠the󰀠HCPL-4504󰀠series󰀠an󰀠excellent󰀠solution󰀠to󰀠IPM󰀠inverter󰀠dead󰀠time󰀠and󰀠other󰀠switching󰀠problems.󰀠The󰀠CTR,󰀠propagation󰀠delay,󰀠and󰀠CMR󰀠are󰀠specified󰀠both󰀠for󰀠TTL󰀠and󰀠IPM󰀠conditions󰀠which󰀠are󰀠provided󰀠for󰀠ease󰀠of󰀠application.󰀠These󰀠single󰀠channel,󰀠diode-transistor󰀠opto-couplers󰀠are󰀠available󰀠in󰀠8-Pin󰀠DIP,󰀠SO-8,󰀠and󰀠Widebody󰀠package󰀠configurations.󰀠An󰀠insulating󰀠layer󰀠between󰀠a󰀠LED󰀠and󰀠an󰀠integrated󰀠photodetector󰀠provide󰀠electrical󰀠insulation󰀠between󰀠input󰀠and󰀠output.󰀠Separate󰀠connec-tions󰀠for󰀠the󰀠photodiode󰀠bias󰀠and󰀠output-transistor󰀠col-lector󰀠increase󰀠the󰀠speed󰀠up󰀠to󰀠a󰀠hundred󰀠times󰀠that󰀠of󰀠a󰀠conventional󰀠phototransistor󰀠coupler󰀠by󰀠reducing󰀠the󰀠base󰀠collector󰀠capacitance.

Features

•󰀠Short󰀠propagation󰀠delays󰀠for󰀠TTL󰀠and󰀠IPM󰀠applications•󰀠15󰀠kV/µs󰀠minimum󰀠Common󰀠Mode󰀠Transient󰀠immu-nity󰀠at󰀠VCM󰀠=󰀠1500󰀠V󰀠for󰀠TTL/load󰀠drive•󰀠High󰀠CTR󰀠at󰀠TA󰀠=󰀠25°C󰀠

󰀠󰀠󰀠󰀠>25%󰀠for󰀠HCPL-4504/0454󰀠󰀠󰀠󰀠󰀠>23%󰀠for󰀠HCNW4504󰀠󰀠󰀠󰀠󰀠󰀠>19%󰀠for󰀠HCPL-J454

•󰀠Electrical󰀠specifications󰀠for󰀠common󰀠IPM󰀠applications•󰀠TTL󰀠compatible

•󰀠Guaranteed󰀠performance󰀠from󰀠0°C󰀠to󰀠70°C󰀠•󰀠Open󰀠collector󰀠output•󰀠Safety󰀠approval:󰀠UL󰀠recognized

󰀠–󰀠3750󰀠V󰀠rms/1min.󰀠for󰀠HCPL-4504/0454/J454󰀠󰀠–󰀠5000󰀠V󰀠rms/1min.󰀠for󰀠HCPL-4504󰀠Option󰀠020󰀠and󰀠HCNW4504󰀠󰀠CSA󰀠approved󰀠󰀠

IEC/EN/DIN󰀠EN󰀠60747-5-2󰀠approved

󰀠–󰀠VIORM󰀠=󰀠560󰀠Vpeak󰀠for󰀠HCPL-0454󰀠Option󰀠060󰀠–󰀠VIORM󰀠=󰀠630󰀠Vpeak󰀠for󰀠HCPL-4504󰀠Option󰀠060󰀠–󰀠VIORM󰀠=󰀠891󰀠Vpeak󰀠for󰀠HCPL-J454󰀠–󰀠VIORM󰀠=󰀠1414󰀠Vpeak󰀠for󰀠HCNW4504

Functional Diagram

NC1ANODE2CATHODE3NC48VCC7NC6VO5GNDApplications

TRUTH TABLELEDVOONLOWOFFHIGHA󰀠0.1󰀠µF󰀠bypass󰀠capacitor󰀠between󰀠pins󰀠5󰀠and󰀠8󰀠is󰀠recommended.

Schematic

ICC8VCCANODE+2VF–3IFHCPL-4504 Functional DiagramIO6•󰀠󰀠Inverter󰀠circuits󰀠and󰀠Intelligent󰀠Power󰀠Module󰀠(IPM)󰀠

interfacing:󰀠High󰀠Common󰀠Mode󰀠Transient󰀠immunity󰀠(>󰀠10󰀠kV/µs󰀠for󰀠an󰀠IPM󰀠load/drive)󰀠and󰀠(tPLH󰀠-󰀠tPHL)󰀠Specified󰀠(see󰀠Power󰀠Inverter󰀠Dead󰀠Time󰀠section)•󰀠Line󰀠receivers:󰀠Short󰀠propagation󰀠delays󰀠and󰀠low󰀠in-put-output󰀠capacitance

•󰀠High󰀠speed󰀠logic󰀠ground󰀠isolation:󰀠TTL/TTL,󰀠TTL/CMOS,󰀠TTL/LSTTL

•󰀠Replaces󰀠pulse󰀠transformers:󰀠Save󰀠board󰀠space󰀠and󰀠weight

•󰀠Analog󰀠signal󰀠ground󰀠isolation:󰀠Integrated󰀠photode-tector󰀠provides󰀠improved󰀠linearity󰀠over󰀠phototransis-tors

CATHODEVOSHIELD5GNDCAUTION: It is advised that normal static precautions be taken in handling and assembly of this component to prevent damage and/or degradation which may be induced by ESD.

Ordering Information

HCPL-0454,󰀠HCPL-4504󰀠and󰀠HCPL-J454󰀠are󰀠UL󰀠Recognized󰀠with󰀠3750󰀠Vrms󰀠for󰀠1󰀠minute󰀠per󰀠UL1577.

HCNW4504󰀠is󰀠UL󰀠Recognized󰀠with󰀠5000󰀠Vrms󰀠for󰀠1󰀠minute󰀠per󰀠UL1577.󰀠HCPL-0454,󰀠HCPL-4504,󰀠HCPL-J454󰀠and󰀠HCNW4504󰀠are󰀠approved󰀠under󰀠CSA󰀠Component󰀠Acceptance󰀠Notice󰀠#5,󰀠File󰀠CA󰀠88324.

OptionRoHSnon RoHSCompliantCompliant

-000E-300E-500E-020E

HCPL-4504-320E-520E-060E-360E-560E-000E-300E

HCPL-J454-400E-500E-600E-000E

HCPL-0454-500E-060E-560E-000E

HCNW4504-300E-500E

no󰀠option#300#500#020#320#520#060#360#560no󰀠option#300NA#500NAno󰀠option#500#060#560no󰀠option#300#500

400󰀠milWidebodyDIP-8SO-8300󰀠mil󰀠DIP-8

XXXXXXXXXX

XX

XX

XXX

X

XXXXX

XXXX

XX

XX

XX

X

300󰀠mil󰀠DIP-8

XXXX

XXXX

XX

XXX

XXXXXXXX

PartNumber

Package

SurfaceMountGullWingTape& Reel

UL 15775000 Vrms/1 Minuterating

IEC/EN/DINEN 60747-5-2

Quantity

50󰀠per󰀠tube50󰀠per󰀠tube1000󰀠per󰀠reel50󰀠per󰀠tube50󰀠per󰀠tube1000󰀠per󰀠reel50󰀠per󰀠tube50󰀠per󰀠tube1000󰀠per󰀠reel50󰀠per󰀠tube50󰀠per󰀠tube50󰀠per󰀠tube1000󰀠per󰀠reel750󰀠per󰀠reel100󰀠per󰀠tube1500󰀠per󰀠reel100󰀠per󰀠tube1500󰀠per󰀠reel42󰀠per󰀠tube42󰀠per󰀠tube750󰀠per󰀠reel

To󰀠order,󰀠choose󰀠a󰀠part󰀠number󰀠from󰀠the󰀠part󰀠number󰀠column󰀠and󰀠combine󰀠with󰀠the󰀠desired󰀠option󰀠from󰀠the󰀠option󰀠column󰀠to󰀠form󰀠an󰀠order󰀠entry.󰀠Example󰀠1:

HCPL-4504-560E󰀠to󰀠order󰀠product󰀠of󰀠300󰀠mil󰀠DIP󰀠Gull󰀠Wing󰀠Surface󰀠Mount󰀠package󰀠in󰀠Tape󰀠and󰀠Reel󰀠packaging󰀠with󰀠IEC/EN/DIN󰀠EN󰀠60747-5-2󰀠Safety󰀠Approval󰀠and󰀠RoHS󰀠compliant.Example󰀠2:

HCPL-4504󰀠to󰀠order󰀠product󰀠of󰀠300󰀠mil󰀠DIP󰀠package󰀠in󰀠Tube󰀠packaging󰀠and󰀠non󰀠RoHS󰀠compliant.

Option󰀠datasheets󰀠are󰀠available.󰀠Contact󰀠your󰀠Avago󰀠sales󰀠representative󰀠or󰀠authorized󰀠distributor󰀠for󰀠information.Remarks:󰀠The󰀠notation󰀠‘#XXX’󰀠is󰀠used󰀠for󰀠existing󰀠products,󰀠while󰀠(new)󰀠products󰀠launched󰀠since󰀠July󰀠15,󰀠2001󰀠and󰀠RoHS󰀠compliant󰀠will󰀠use󰀠‘–XXXE.’

2

Package Outline DrawingsHCPL-4504 Outline Drawing

9.65 ± 0.25(0.380 ± 0.010)TYPE NUMBER8765OPTION CODE*DATE CODE7.62 ± 0.25(0.300 ± 0.010)6.35 ± 0.25(0.250 ± 0.010)A XXXXZYYWW11.19 (0.047) MAX.234ULRECOGNITION1.78 (0.070) MAX.+ 0.0760.254- 0.051+ 0.003)(0.010- 0.002)5° TYP.3.56 ± 0.13(0.140 ± 0.005)4.70 (0.185) MAX.0.51 (0.020) MIN.2.92 (0.115) MIN.DIMENSIONS IN MILLIMETERS AND (INCHES).* MARKING CODE LETTER FOR OPTION NUMBERS\"L\" = OPTION 020\"V\" = OPTION 060OPTION NUMBERS 300 AND 500 NOT MARKED.NOTE: FLOATING LEAD PROTRUSION IS 0.25 mm (10 mils) MAX.1.080 ± 0.320(0.043 ± 0.013)0.65 (0.025) MAX.2.54 ± 0.25(0.100 ± 0.010)HCPL-4504 Gull Wing Surface Mount Option 300 Outline DrawingRULAND PATTERN RECOMMENDATION9.65 ± 0.25(0.380 ± 0.010)87651.016 (0.040)6.350 ± 0.25(0.250 ± 0.010)10.9 (0.430)12341.27 (0.050)1.780(0.070)MAX.9.65 ± 0.25(0.380 ± 0.010)7.62 ± 0.25(0.300 ± 0.010)2.0 (0.080)1.19(0.047)MAX.3.56 ± 0.13(0.140 ± 0.005)+ 0.0760.254- 0.051+ 0.003)(0.010- 0.002)1.080 ± 0.320(0.043 ± 0.013)0.635 ± 0.1302.54(0.025 ± 0.005)(0.100)BSCDIMENSIONS IN MILLIMETERS (INCHES).LEAD COPLANARITY = 0.10 mm (0.004 INCHES).0.635 ± 0.25(0.025 ± 0.010)12° NOM.NOTE: FLOATING LEAD PROTRUSION IS 0.25 mm (10 mils) MAX.3

Package Outline DrawingsHCPL-J454 Outline Drawing

9.80 ± 0.25(0.386 ± 0.010)8765DATE CODE7.62 ± 0.25(0.300 ± 0.010)6.35 ± 0.25(0.250 ± 0.010)TYPE NUMBERA XXXXYYWW11.19 (0.047) MAX.234ULRECOGNITION1.78 (0.070) MAX.+ 0.0760.254- 0.051+ 0.003)(0.010- 0.002)5 TYP.3.56 ± 0.13(0.140 ± 0.005)4.70 (0.185) MAX.0.51 (0.020) MIN.2.92 (0.115) MIN.DIMENSIONS IN MILLIMETERS AND (INCHES).OPTION NUMBERS 300 AND 500 NOT MARKED.NOTE: FLOATING LEAD PROTRUSION IS 0.5 mm (20 mils) MAX.1.080 ± 0.320(0.043 ± 0.013)0.65 (0.025) MAX.2.54 ± 0.25(0.100 ± 0.010)HCPL-J454 Gull Wing Surface Mount Option 300 Outline DrawingRULAND PATTERN RECOMMENDATION9.80 ± 0.25(0.386 ± 0.010)87651.016 (0.040)6.350 ± 0.25(0.250 ± 0.010)10.9 (0.430)12341.27 (0.050)1.780(0.070)MAX.9.65 ± 0.25(0.380 ± 0.010)7.62 ± 0.25(0.300 ± 0.010)2.0 (0.080)1.19(0.047)MAX.3.56 ± 0.13(0.140 ± 0.005)+ 0.0760.254- 0.051+ 0.003)(0.010- 0.002)1.080 ± 0.320(0.043 ± 0.013)0.635 ± 0.1302.54(0.025 ± 0.005)(0.100)BSCDIMENSIONS IN MILLIMETERS (INCHES).LEAD COPLANARITY = 0.10 mm (0.004 INCHES).0.635 ± 0.25(0.025 ± 0.010)12° NOM.NOTE: FLOATING LEAD PROTRUSION IS 0.5 mm (20 mils) MAX.4

HCPL-J454-400E/600E Widelead Gullwing Surface Mount Outline Drawing

LANDPATTERNRECOMMENDATION

9.80±0.250.386±0.0101.0160.040TYPENUMBERDATECODEAXXXXYYWW6.35±0.250.250±0.0101.270.05012.90.508ULRECOGNITION[0.65]0.025MAX[1.19]0.047MAX.3.56±0.130.140±0.005[1.080]0.3200.0430.0132.540.100BSC2.00.08[11.750.25]0.4600.0107.62±0.510.300±0.020[0.20]0.008[0.33]0.013[0.152]0.006[0.406]0.0160.625±0.2540.025±0.01030°NOM.DIMENSIONSIN[MILLIMETERS]INCHES

OPTIONNUMBERS400AND600NOTMARKED.

RUIS0.5mm(20mils)MAX.NOTE:FLOATINGLEADPROTRUSION

LEADCOPLANARITY

MAXIMUM:[0.102]0.004

HCPL-0454 Outline Drawing (8-Pin Small Outline Package)

LAND PATTERN RECOMMENDATION87653.937 ± 0.127(0.155 ± 0.005)PIN ONE10.406 ± 0.076(0.016 ± 0.003)2XXXYWW5.994 ± 0.203(0.236 ± 0.008)TYPE NUMBER(LAST 3 DIGITS)DATE CODE7.49 (0.295)341.9 (0.075)1.270BSC(0.050)0.64 (0.025)*5.080 ± 0.127(0.200 ± 0.005)3.175 ± 0.127(0.125 ± 0.005)7 45 X0.432(0.017)1.524(0.060)0 ~ 7 0.228 ± 0.025(0.009 ± 0.001)0.203 ± 0.102(0.008 ± 0.004)*TOTAL PACKAGE LENGTH (INCLUSIVE OF MOLD FLASH)5.207 ± 0.254 (0.205 ± 0.010)DIMENSIONS IN MILLIMETERS (INCHES).LEAD COPLANARITY = 0.10 mm (0.004 INCHES) MAX.0.305MIN.(0.012)NOTE: FLOATING LEAD PROTRUSION IS 0.15 mm (6 mils) MAX.5

HCNW4504 Outline Drawing (8-Pin Widebody Package)

11.15 ± 0.15(0.442 ± 0.006)876511.00MAX.(0.433)9.00 ± 0.15(0.354 ± 0.006)TYPE NUMBERA HCNWXXXXYYWWDATE CODE12341.55(0.061)MAX.10.16 (0.400)TYP.7° TYP.+ 0.0760.254- 0.0051+ 0.003)(0.010- 0.002)5.10MAX.(0.201)3.10 (0.122)3.90 (0.154)2.54 (0.100)TYP.1.78 ± 0.15(0.070 ± 0.006)0.40 (0.016)0.56 (0.022)0.51 (0.021) MIN.DIMENSIONS IN MILLIMETERS (INCHES).NOTE: FLOATING LEAD PROTRUSION IS 0.25 mm (10 mils) MAX.HCNW4504 Gull Wing Surface Mount Option 300 Outline Drawing

11.15 ± 0.15(0.442 ± 0.006)8765LAND PATTERN RECOMMENDATION9.00 ± 0.15(0.354 ± 0.006)13.56(0.534)12341.3(0.051)1.55(0.061)MAX.12.30 ± 0.30(0.484 ± 0.012)11.00MAX.(0.433)2.29(0.09)4.00MAX.(0.158)1.78 ± 0.15(0.070 ± 0.006)2.54(0.100)BSC0.75 ± 0.25(0.030 ± 0.010)1.00 ± 0.15(0.039 ± 0.006)+ 0.0760.254- 0.0051+ 0.003)(0.010- 0.002)7° NOM.DIMENSIONS IN MILLIMETERS (INCHES).LEAD COPLANARITY = 0.10 mm (0.004 INCHES).NOTE: FLOATING LEAD PROTRUSION IS 0.25 mm (10 mils) MAX.6

Solder Reflow Temperature Profile

300PREHEATINGRATE3°C+1°C/–0.5°C/SEC.REFLOWHEATINGRATE2.5°C±0.5°C/SEC.PEAKTEMP.245°CPEAKTEMP.240°C200TEMPERATURE(°C)160°C150°C140°C3°C+1°C/–0.5°C1002.5C±0.5°C/SEC.30SEC.30SEC.PEAKTEMP.230°CSOLDERINGTIME200°CPREHEATINGTIME150°C,90+30SEC.ROOMTEMPERATURE

0050100TIME(SECONDS)

NOTE:NON-HALIDEFLUXSHOULDBEUSED.

15050SEC.TIGHTTYPICALLOOSE200250Recommended Pb-Free IR Profile

TIMEWITHIN5°CofACTUALPEAKTEMPERATURE15SEC.tpTpTL

TEMPERATURETsmaxTsmin

tsPREHEAT60to180SEC.25

tL*260+0/-5°C217°C150-200°CRAMP-UP3°C/SEC.MAX.RAMP-DOWN6°C/SEC.MAX.60to150SEC.t25°CtoPEAKTIME

NOTES:

THETIMEFROM25°CtoPEAKTEMPERATURE=8MINUTESMAX.Tsmax=200°C,Tsmin=150°C

NOTE:NON-HALIDEFLUXSHOULDBEUSED.

*RECOMMENDEDPEAKTEMPERATUREFORWIDEBODY400milsPACKAGEIS245°C

7

Regulatory Information

The󰀠devices󰀠contained󰀠in󰀠this󰀠data󰀠sheet󰀠have󰀠been󰀠approved󰀠by󰀠the󰀠following󰀠agencies:Agency/Standard

Underwriters Laboratories (UL)

UL1577

Recognized󰀠under󰀠UL1577,󰀠󰀠

Component󰀠Recognition󰀠Program,󰀠󰀠Category󰀠FPQU2,󰀠File󰀠E55361

HCPL-4504

3750󰀠Vrms󰀠/󰀠󰀠1󰀠minute,󰀠

Option󰀠020󰀠5000󰀠Vrms󰀠/󰀠1󰀠minute3750󰀠Vrms󰀠/󰀠󰀠1󰀠minute,󰀠

Option󰀠020󰀠5000󰀠Vrms󰀠/󰀠1󰀠minuteOption󰀠060󰀠󰀠󰀠

VIORM󰀠=󰀠630󰀠Vpeak

HCPL-J454

3750󰀠Vrms󰀠/󰀠󰀠1󰀠minute

HCPL-0454

3750󰀠Vrms󰀠/󰀠󰀠1󰀠minute

HCNW4504

5000󰀠Vrms󰀠/󰀠󰀠1󰀠minute

Canadian Standards Association (CSA)

File󰀠CA88324

ComponentAcceptanceNotice󰀠#5

3750󰀠Vrms󰀠/󰀠󰀠1󰀠minute3750󰀠Vrms󰀠/󰀠󰀠1󰀠minute5000󰀠Vrms󰀠/󰀠󰀠1󰀠minute

IEC/EN/DIN EN 60747-5-2

Approved󰀠under:

IEC󰀠60747-5-2:1997󰀠+󰀠A1:2002EN󰀠60747-5-2:2001󰀠+󰀠A1:2002

DIN󰀠EN󰀠60747-5-2󰀠(VDE󰀠0884󰀠Teil󰀠2):2003-01

VIORM󰀠=󰀠891󰀠Vpeak

Option󰀠060󰀠󰀠VIORM󰀠=󰀠560󰀠Vpeak

VIORM󰀠=󰀠1414󰀠Vpeak

Insulation and Safety Related Specifications

Value

HCPL-4504

7.1

Parameter

Minimum󰀠External󰀠Air󰀠Gap󰀠

(External󰀠Clearance)Minimum󰀠External󰀠Tracking󰀠

(External󰀠Creepage)Minimum󰀠Internal󰀠Plastic󰀠Gap󰀠

(Internal󰀠Clearance)

Symbol

L(101)

HCPL-HCPL-J454

J454All other -400E/-600Eoptions

8.0

7.4

HCPL-0454

4.9

HCNW4504

9.6

Units

mm

Conditions

Measured󰀠from󰀠input󰀠ter-minals󰀠to󰀠output󰀠terminals,󰀠shortest󰀠distance󰀠through󰀠air.Measured󰀠from󰀠input󰀠ter-minals󰀠to󰀠output󰀠terminals,󰀠shortest󰀠distance󰀠path󰀠along󰀠body.

Through󰀠insulation󰀠distance,󰀠conductor󰀠to󰀠conductor,󰀠usually󰀠the󰀠direct󰀠distance󰀠between󰀠the󰀠photoemitter󰀠and󰀠photodetector󰀠inside󰀠the󰀠optocoupler󰀠cavity.Measured󰀠from󰀠input󰀠ter-minals󰀠to󰀠output󰀠󰀠terminals,󰀠along󰀠internal󰀠cavity.DIN󰀠IEC󰀠112/VDE󰀠0303󰀠Part󰀠1

L(102)7.48.08.04.810.0mm

0.080.50.50.081.0mm

Minimum󰀠Internal󰀠Tracking󰀠(Internal󰀠Creepage)

Tracking󰀠Resistance󰀠(Comparative󰀠Tracking󰀠Index)Isolation󰀠Group

CTI

NANANANA4.0mm

≥175≥175≥175≥175≥200Volts

IIIaIIIaIIIaIIIaIIIa

Material󰀠Group󰀠(DIN󰀠VDE󰀠0110,󰀠1/89,󰀠Table󰀠1)

All󰀠Avago󰀠data󰀠sheets󰀠report󰀠the󰀠creepage󰀠and󰀠clearance󰀠inherent󰀠to󰀠the󰀠optocoupler󰀠component󰀠itself.󰀠These󰀠di-mensions󰀠are󰀠needed󰀠as󰀠a󰀠starting󰀠point󰀠for󰀠the󰀠equip-ment󰀠designer󰀠when󰀠determining󰀠the󰀠circuit󰀠insulation󰀠requirements.

However,󰀠once󰀠mounted󰀠on󰀠a󰀠printed󰀠circuit󰀠board,󰀠mini-mum󰀠creepage󰀠and󰀠clearance󰀠requirements󰀠must󰀠be󰀠met󰀠as󰀠specified󰀠for󰀠individual󰀠equipment󰀠standards.󰀠For󰀠8

creepage,󰀠the󰀠shortest󰀠distance󰀠path󰀠along󰀠the󰀠surface󰀠of󰀠a󰀠printed󰀠circuit󰀠board󰀠between󰀠the󰀠solder󰀠fillets󰀠of󰀠the󰀠input󰀠and󰀠output󰀠leads󰀠must󰀠be󰀠considered.󰀠There󰀠are󰀠recommended󰀠techniques󰀠such󰀠as󰀠grooves󰀠and󰀠ribs󰀠which󰀠may󰀠be󰀠used󰀠on󰀠a󰀠printed󰀠circuit󰀠board󰀠to󰀠achieve󰀠desired󰀠creepage󰀠and󰀠clearances.󰀠Creepage󰀠and󰀠clear-ance󰀠distances󰀠will󰀠also󰀠change󰀠depending󰀠on󰀠factors󰀠such󰀠as󰀠pollution󰀠degree󰀠and󰀠insulation󰀠level.

IEC/EN/DIN EN 60747-5-2 Insulation Related Characteristics

HCPL-0454

Description

Installation󰀠classification󰀠perDIN󰀠VDE󰀠0110/1.89,󰀠Table󰀠1

󰀠for󰀠rated󰀠mains󰀠voltage󰀠≤150󰀠V󰀠rms󰀠for󰀠rated󰀠mains󰀠voltage󰀠≤300󰀠V󰀠rms󰀠for󰀠rated󰀠mains󰀠voltage󰀠≤450󰀠V󰀠rms󰀠for󰀠rated󰀠mains󰀠voltage󰀠≤600󰀠V󰀠rms󰀠for󰀠rated󰀠mains󰀠voltage󰀠≤1000󰀠V󰀠rmsClimatic󰀠Classification

Pollution󰀠Degree󰀠(DIN󰀠VDE󰀠0110/1.89)Maximum󰀠Working󰀠Insulation󰀠VoltageInput󰀠to󰀠Output󰀠Test󰀠Voltage,󰀠Method󰀠b*󰀠VIORM󰀠x󰀠1.875󰀠=󰀠VPR,󰀠100%󰀠Production󰀠Test󰀠with󰀠tm󰀠=󰀠1󰀠sec,󰀠Partial󰀠Discharge󰀠<󰀠5󰀠pC

Input󰀠to󰀠Output󰀠Test󰀠Voltage,󰀠Method󰀠a*󰀠VIORM󰀠x󰀠1.5󰀠=󰀠VPR,󰀠Type󰀠and󰀠Sample󰀠Test,󰀠tm󰀠=󰀠60󰀠sec,

󰀠Partial󰀠Discharge󰀠<󰀠5󰀠pC

Highest󰀠Allowable󰀠Overvoltage*(Transient󰀠Overvoltage,󰀠tini󰀠=󰀠10󰀠sec)Safety󰀠Limiting󰀠Values󰀠-󰀠Maximum

Values󰀠Allowed󰀠in󰀠the󰀠Event󰀠of󰀠a󰀠Failure,also󰀠see󰀠󰀠Thermal󰀠Derating󰀠curve󰀠Case󰀠Temperature󰀠Input󰀠Current󰀠Output󰀠Power

Insulation󰀠Resistance󰀠at󰀠TS,󰀠VIO󰀠=󰀠500󰀠V

VIORMVPRSymbol

OPTION 060

HCPL-4504OPTION 060

HCPL-J454

HCNW4504

Unit

I-IVI-III

I-IVI-IVI-III

I-IVI-IVI-IIII-III55/100/2128911670

I-IVI-IVI-IVI-IVI-III55/85/21214142652

V󰀠peakV󰀠peak

55/100/2125601050

55/100/2126301181

VPR

84094513362121

V󰀠peak

VIOTM

4000600060008000

V󰀠peak

TSIS,INPUTPS,OUTPUTRS

150150600≥109

175230600≥109

175400600≥109

150400700≥109

°CmAmWΩ

*Refer󰀠to󰀠the󰀠optocoupler󰀠section󰀠of󰀠the󰀠Designer's󰀠Catalog,󰀠under󰀠regulatory󰀠information󰀠(IEC/EN/DIN󰀠EN󰀠60747-5-2)󰀠for󰀠a󰀠detailed󰀠description󰀠of󰀠Method󰀠a󰀠and󰀠Method󰀠b󰀠partial󰀠discharge󰀠test󰀠profiles.NOTE:󰀠These󰀠optocouplers󰀠are󰀠suitable󰀠for󰀠\"safe󰀠electrical󰀠isolation\"󰀠only󰀠within󰀠the󰀠safety󰀠limit󰀠data.󰀠Maintenance󰀠of󰀠the󰀠safety󰀠data󰀠shall󰀠be󰀠ensured󰀠by󰀠means󰀠of󰀠protective󰀠circuits.

NOTE:󰀠Insulation󰀠Characteristics󰀠are󰀠per󰀠IEC/EN/DIN󰀠EN󰀠60747-5-2.

NOTE:󰀠Surface󰀠mount󰀠classification󰀠is󰀠Class󰀠A󰀠in󰀠accordance󰀠with󰀠CECC󰀠00802.

9

Absolute Maximum RatingsParameter

Storage󰀠TemperatureOperating󰀠Temperature

Symbol

TSTA

Device

HCPL-4504HCPL-0454HCPL-J454HCNW4504

Min.

-55-55

Max.

125100

Units

°C°C

Note

-558525

mAmA

12

504010.1534540816

mAmAVVmW°C

4

mW

3

VA

Average󰀠Forward󰀠Input󰀠CurrentPeak󰀠Forward󰀠Input󰀠Current

󰀠(50%󰀠duty󰀠cycle,󰀠1󰀠ms󰀠pulse󰀠width)󰀠

Peak󰀠Transient󰀠Input󰀠Current󰀠(≤1󰀠µs󰀠pulse󰀠width,󰀠300󰀠pps)󰀠

Reverse󰀠LED󰀠Input󰀠Voltage󰀠(Pin󰀠3-2)󰀠󰀠

Input󰀠Power󰀠Dissipation󰀠󰀠

Average󰀠Output󰀠Current󰀠(Pin󰀠6)Peak󰀠Output󰀠CurrentSupply󰀠Voltage󰀠(Pin󰀠8-5)Output󰀠Voltage󰀠(Pin󰀠6-5)Output󰀠Power󰀠Dissipation

Lead󰀠Solder󰀠Temperature(Through-Hole󰀠Parts󰀠Only)

󰀠󰀠1.6󰀠mm󰀠below󰀠seating󰀠plane,󰀠10󰀠seconds󰀠󰀠󰀠󰀠󰀠󰀠󰀠Up󰀠to󰀠seating󰀠plane,󰀠10󰀠secondsReflow󰀠Temperature󰀠Profile

IF(AVG)IF(PEAK)

HCPL-4504HCPL-0454HCPL-J454HCNW4504

IF(TRANS)

HCPL-4504HCPL-0454HCPL-J454HCNW4504

VR

HCPL-4504HCPL-0454HCPL-J454HCNW4504

PIN

HCPL-4504HCPL-0454HCPL-J454HCNW4504

IO(AVG)IO(PEAK)VCCVOPOTLS

HCPL-4504HCPL-J454HCNW4504

TRP

HCPL-0454,Option󰀠300󰀠,Option󰀠500,󰀠Option󰀠400E&󰀠Option󰀠600E.

-0.5-0.5

3020100260

260

See󰀠Package Outline Drawings󰀠

section

10

Electrical Specifications (DC)

Over󰀠recommended󰀠temperature󰀠(TA󰀠=󰀠0°C󰀠to󰀠70°C)󰀠unless󰀠otherwise󰀠specified.󰀠See󰀠note󰀠12.

Parameter

CurrentTransferRatio

Symbol

CTR

Device

HCPL-4504HCPL-0454HCPL-J454HCNW4504

Min.

252119132319262221162521

Typ.*

3234373929313537434533350.20.20.50.20.50.0030.01

Max.

60606063656565680.40.50.40.40.5150200

Units

%

Test Conditions

TA󰀠=󰀠25°CTA󰀠=󰀠25°CTA󰀠=󰀠25°C

VO󰀠=󰀠0.4󰀠VVO󰀠=󰀠0.5󰀠VVO󰀠=󰀠0.4󰀠VVO󰀠=󰀠0.5󰀠VVO󰀠=󰀠0.4󰀠VVO󰀠=󰀠0.5󰀠VVO󰀠=󰀠0.4󰀠VVO󰀠=󰀠0.5󰀠V

TA󰀠=󰀠25°CTA󰀠=󰀠25°C

VO󰀠=󰀠0.4󰀠VVO󰀠=󰀠0.5󰀠VVO󰀠=󰀠0.4󰀠VVO󰀠=󰀠0.5󰀠VIO󰀠=󰀠4.0󰀠mAIO󰀠=󰀠3.3󰀠mA

TA󰀠=󰀠25°CTA󰀠=󰀠25°C

IO󰀠=󰀠3.6󰀠mAIO󰀠=󰀠3.0󰀠mAIO󰀠=󰀠3.6󰀠mAIO󰀠=󰀠3.0󰀠mAVO󰀠=󰀠VCC󰀠=󰀠5.5󰀠VVO󰀠=󰀠VCC󰀠=󰀠15󰀠V

IF󰀠=󰀠0󰀠mAIF󰀠=󰀠16󰀠mA,VCC󰀠=󰀠4.5󰀠VIF󰀠=󰀠12󰀠mA,VCC󰀠=󰀠4.5󰀠VIF󰀠=󰀠16󰀠mA,VCC󰀠=󰀠4.5󰀠V

Fig.

1,󰀠2,4

Note

5

CurrentTransferRatio

CTR

HCPL-4504HCPL-0454HCPL-J454HCNW4504

%TA󰀠=󰀠25°C

1,󰀠2,4

5

Logic󰀠LowOutputVoltage

VOL

HCPL-4504HCPL-0454HCPL-J454HCNW4504

V

TA󰀠=󰀠25°C

Logic󰀠HighOutputCurrentLogic󰀠LowSupplyCurrentLogic󰀠HighSupply󰀠CurrentInput󰀠ForwardVoltage

IOH

µA

TA󰀠=󰀠25°CTA󰀠=󰀠25°C

5

ICCL

HCPL-4504HCPL-0454HCNW4504HCPL-J454

50µA

IF󰀠=󰀠16󰀠mA,󰀠VO󰀠=󰀠Open,󰀠VCC󰀠=󰀠15󰀠V

12

70

0.02

121.71.8

1.451.3553

-1.6-1.460

70

pF

f󰀠=󰀠1󰀠MHz,󰀠VF󰀠=󰀠0󰀠V

mV/°C

1.59

1.851.95

V

IR󰀠=󰀠10󰀠µAIR󰀠=󰀠100󰀠µAIF󰀠=󰀠16󰀠mATA󰀠=󰀠25°C

IF󰀠=󰀠16󰀠mA

µAV

TA󰀠=󰀠25°CTA󰀠=󰀠25°C

IF󰀠=󰀠0󰀠mA,󰀠VO󰀠=󰀠Open,VCC󰀠=󰀠15󰀠VIF󰀠=󰀠16󰀠mA

312

ICCHVF

HCPL-4504HCPL-0454HCPL-J454HCNW4504

1.5

Input󰀠ReverseBreakdownVoltage

BVR

HCPL-4504HCPL-0454HCPL-J454HCNW4504

TemperatureCoefficientof󰀠ForwardVoltageInput

Capacitance

∆VF∆TA

HCPL-4504HCPL-0454HCPL-J454HCNW4504

CIN

HCPL-4504HCPL-0454HCPL-J454HCNW4504

*All󰀠typicals󰀠at󰀠TA󰀠=󰀠25°C.

11

AC Switching Specifications

Parameter

Over󰀠recommended󰀠temperature󰀠(TA󰀠=󰀠0°C󰀠to󰀠70°C)󰀠unless󰀠otherwise󰀠specified.

Symbol Device

Min.

Typ.0.20.2

Max.0.30.5

Unitsµs

Test ConditionsTA󰀠=󰀠25°C

Pulse:󰀠󰀠f󰀠=󰀠20󰀠kHz,Duty󰀠Cycle󰀠=󰀠10%,IF󰀠=󰀠16󰀠mA,󰀠VCC󰀠=󰀠5.0󰀠V,RL󰀠=󰀠1.9󰀠kΩ,󰀠CL󰀠=󰀠15󰀠pF,VTHHL󰀠=󰀠1.5󰀠V

Pulse:󰀠󰀠f󰀠=󰀠10󰀠󰀠kHz,Duty󰀠Cycle󰀠=󰀠50%,

IF󰀠=󰀠12󰀠mA,󰀠VCC󰀠=󰀠15.0󰀠V,RL󰀠=󰀠20󰀠kΩ,󰀠CL󰀠=󰀠100󰀠pF,VTHHL󰀠=󰀠1.5󰀠V

Pulse:󰀠󰀠f󰀠=󰀠20󰀠󰀠kHz,Duty󰀠Cycle󰀠=󰀠10%,IF󰀠=󰀠16󰀠mA,󰀠VCC󰀠=󰀠5.0󰀠V,RL󰀠=󰀠1.9󰀠kΩ,󰀠CL󰀠=󰀠15󰀠pF,VTHLH󰀠=󰀠1.5󰀠V

Pulse:󰀠󰀠f󰀠=󰀠10󰀠󰀠kHz,Duty󰀠Cycle󰀠=󰀠50%,

IF󰀠=󰀠12󰀠mA,󰀠VCC󰀠=󰀠15.0󰀠V,RL󰀠=󰀠20󰀠kΩ,󰀠CL󰀠=󰀠100󰀠pF,VTHLH󰀠=󰀠2.0󰀠V

Pulse:󰀠󰀠f󰀠=󰀠10󰀠󰀠kHz,Duty󰀠Cycle󰀠=󰀠50%,

IF󰀠=󰀠12󰀠mA,󰀠VCC󰀠=󰀠15.0󰀠V,RL󰀠=󰀠20󰀠kΩ,󰀠CL󰀠=󰀠100󰀠pF,VTHHL󰀠=󰀠1.5󰀠V,󰀠VTHLH󰀠=󰀠2.0󰀠VVCC󰀠=󰀠5.0󰀠V,󰀠RL󰀠=󰀠1.9󰀠kΩ,CL󰀠=󰀠15󰀠pF,󰀠IF󰀠=󰀠0󰀠mAVCC󰀠=󰀠15.0󰀠V,󰀠RL󰀠=󰀠20󰀠kΩ,CL󰀠=󰀠100󰀠pF,󰀠IF󰀠=󰀠0󰀠mAVCC󰀠=󰀠5.0󰀠V,󰀠RL󰀠=󰀠1.9󰀠kΩ,CL󰀠=󰀠15󰀠pF,󰀠IF󰀠=󰀠16󰀠mAVCC󰀠=󰀠15.0󰀠V,󰀠RL󰀠=󰀠20󰀠kΩ,CL󰀠=󰀠100󰀠pF,󰀠IF󰀠=󰀠12󰀠mAVCC󰀠=󰀠15.0󰀠V,󰀠RL󰀠=󰀠20󰀠kΩ,CL󰀠=󰀠100󰀠pF,󰀠IF󰀠=󰀠16󰀠mA

Fig.6,8,󰀠9

Note9

Propagation󰀠Delay󰀠tPHLTime󰀠to󰀠Logic󰀠Low󰀠at󰀠Output󰀠

tPHL

HCPL-J454Others

Propagation󰀠Delay󰀠tPLHTime󰀠to󰀠Logic󰀠High󰀠at󰀠Output

0.20.050.1

0.50.71.0

µs

TA󰀠=󰀠25°C

6,10-14

10

0.30.3

0.50.7

µs

TA󰀠=󰀠25°C

6,8,󰀠9

9

tPLH

0.30.2

0.80.8

1.11.4

µs

TA󰀠=󰀠25°C

6,10-14

10

Propagation󰀠Delay󰀠tPLH-Difference󰀠Be-tPHL

tween󰀠Any󰀠2󰀠Parts

-0.4-0.7

0.30.3

0.91.3

µs

TA󰀠=󰀠25°C

6,10-14

17

Common󰀠Mode󰀠󰀠Transient󰀠Immu-nity󰀠at󰀠Logic󰀠HighLevel󰀠Output󰀠󰀠Common󰀠Mode󰀠Transient󰀠Immu-nity󰀠at󰀠󰀠Logic󰀠Low󰀠Level󰀠Output

|CMH||CMH|󰀠|CML||CML|

HCPL-J454Others

|CML|

151515151015

30303030

kV/µskV/µskV/µskV/µs

TA󰀠=󰀠25°CVCM󰀠=1500󰀠VP-PTA󰀠=󰀠25°CVCM󰀠=1500󰀠VP-P

7777

7,󰀠98,󰀠107,󰀠98,󰀠10

30kV/µs78,󰀠10

*All󰀠typicals󰀠at󰀠TA󰀠=󰀠25°C.

12

Package Characteristics

Over󰀠recommended󰀠temperature󰀠(TA󰀠=󰀠0°C󰀠to󰀠25°C)󰀠unless󰀠otherwise󰀠specified.

ParameterInput-OutputMomentaryWithstandVoltage†

SymbolVISO

DeviceHCPL-4504HCPL-0454HCPL-J454HCPL-4504Option󰀠020HCNW4504

Input-OutputResistance

RI-O

HCPL-4504HCPL-0454HCPL-J454HCNW4504

Capacitance(Input-Output)

CI-O

HCPL-4504HCPL-0454HCPL-J454HCNW4504

10121011

0.60.80.5

0.6

pF

Min.3750375050005000

1012

Ω

VI-O󰀠=󰀠500󰀠Vdc

Typ.*

Max.

UnitsV󰀠rms

Test ConditionsRH󰀠≤50%,t󰀠=󰀠1󰀠min.,TA󰀠=󰀠25°C

Figure

Note6,󰀠13,166,󰀠14,16󰀠󰀠6,󰀠11,156,󰀠15,166

1013

TA󰀠=󰀠25°CTA󰀠=󰀠100°Cf󰀠=󰀠1󰀠MHz

6

All󰀠typicals󰀠at󰀠TA󰀠=󰀠25°C..

†The󰀠Input-Output󰀠Momentary󰀠Withstand󰀠Voltage󰀠is󰀠a󰀠dielectric󰀠voltage󰀠rating󰀠that󰀠should󰀠not󰀠be󰀠interpreted󰀠as󰀠an󰀠input-output󰀠continuous󰀠

voltage󰀠rating.󰀠For󰀠the󰀠continuous󰀠voltage󰀠rating󰀠refer󰀠to󰀠the󰀠IEC/EN/DIN󰀠EN󰀠60747-5-2󰀠Insulation󰀠Related󰀠Characteristics󰀠Table󰀠(if󰀠applicable),󰀠your󰀠equipment󰀠level󰀠safety󰀠specification󰀠or󰀠Avago󰀠Application󰀠Note󰀠1074󰀠entitled󰀠“Optocoupler󰀠Input-Output󰀠Endurance󰀠Voltage.”

Notes:

1.󰀠Derate󰀠linearly󰀠above󰀠70°C󰀠free-air󰀠temperature󰀠at󰀠a󰀠rate󰀠of󰀠0.8󰀠mA/°C󰀠(8-Pin󰀠DIP).󰀠Derate󰀠linearly󰀠above󰀠85°C󰀠free-air󰀠temperature󰀠at󰀠a󰀠rate󰀠of󰀠0.5󰀠mA/°C󰀠(SO-8).2.󰀠Derate󰀠linearly󰀠above󰀠70°C󰀠free-air󰀠temperature󰀠at󰀠a󰀠rate󰀠of󰀠1.6󰀠mA/°C󰀠(8-Pin󰀠DIP).󰀠Derate󰀠linearly󰀠above󰀠85°C󰀠free-air󰀠temperature󰀠at󰀠a󰀠rate󰀠of󰀠1.0󰀠mA/°C󰀠(SO-8).

3.󰀠Derate󰀠linearly󰀠above󰀠70°C󰀠free-air󰀠temperature󰀠at󰀠a󰀠rate󰀠of󰀠0.9󰀠mW/°C󰀠(8-Pin󰀠DIP).󰀠Derate󰀠linearly󰀠above󰀠85°C󰀠free-air󰀠temperature󰀠at󰀠a󰀠rate󰀠of󰀠1.1󰀠mW/°C󰀠(SO-8).4.󰀠Derate󰀠linearly󰀠above󰀠70°C󰀠free-air󰀠temperature󰀠at󰀠a󰀠rate󰀠of󰀠2.0󰀠mW/°C󰀠(8-Pin󰀠DIP).󰀠Derate󰀠linearly󰀠above󰀠85°C󰀠free-air󰀠temperature󰀠at󰀠a󰀠rate󰀠of󰀠2.3󰀠mW/°C󰀠(SO-8).

5.󰀠CURRENT󰀠TRANSFER󰀠RATIO󰀠in󰀠percent󰀠is󰀠defined󰀠as󰀠the󰀠ratio󰀠of󰀠output󰀠collector󰀠current,󰀠IO,󰀠to󰀠the󰀠forward󰀠LED󰀠input󰀠current,󰀠IF,󰀠times󰀠100.6.󰀠Device󰀠considered󰀠a󰀠two-terminal󰀠device:󰀠Pins󰀠1,󰀠2,󰀠3,󰀠and󰀠4󰀠shorted󰀠together󰀠and󰀠Pins󰀠5,󰀠6,󰀠7,󰀠and󰀠8󰀠shorted󰀠together.

7.󰀠Under󰀠TTL󰀠load󰀠and󰀠drive󰀠conditions:󰀠Common󰀠mode󰀠transient󰀠immunity󰀠in󰀠a󰀠Logic󰀠High󰀠level󰀠is󰀠the󰀠maximum󰀠tolerable󰀠(positive)󰀠dVCM/dt󰀠on󰀠the󰀠leading󰀠edge󰀠of󰀠the󰀠common󰀠mode󰀠pulse,󰀠VCM,󰀠to󰀠assure󰀠that󰀠the󰀠output󰀠will󰀠remain󰀠in󰀠a󰀠Logic󰀠High󰀠state󰀠(i.e.,󰀠VO󰀠>󰀠2.0󰀠V).󰀠Common󰀠mode󰀠transient󰀠immunity󰀠in󰀠a󰀠Logic󰀠Low󰀠level󰀠is󰀠the󰀠maximum󰀠tolerable󰀠(negative)󰀠dVCM/dt󰀠on󰀠the󰀠trailing󰀠edge󰀠of󰀠the󰀠common󰀠mode󰀠pulse󰀠signal,󰀠VCM,󰀠to󰀠assure󰀠that󰀠the󰀠output󰀠will󰀠remain󰀠in󰀠a󰀠Logic󰀠Low󰀠state󰀠(i.e.,󰀠VO󰀠<󰀠0.8󰀠V).

8.󰀠󰀠Under󰀠IPM󰀠(Intelligent󰀠Power󰀠Module)󰀠load󰀠and󰀠LED󰀠drive󰀠conditions:󰀠Common󰀠mode󰀠transient󰀠immunity󰀠in󰀠a󰀠Logic󰀠High󰀠level󰀠is󰀠the󰀠maximum󰀠tolerable󰀠dVCM/dt󰀠on󰀠the󰀠leading󰀠edge󰀠of󰀠the󰀠common󰀠mode󰀠pulse,󰀠VCM,󰀠to󰀠assure󰀠that󰀠the󰀠output󰀠will󰀠remain󰀠in󰀠a󰀠Logic󰀠High󰀠state󰀠(i.e.,󰀠VO󰀠>󰀠3.0󰀠V).󰀠Common󰀠mode󰀠transient󰀠immunity󰀠in󰀠a󰀠Logic󰀠Low󰀠level󰀠is󰀠the󰀠maximum󰀠tolerable󰀠dVCM/dt󰀠on󰀠the󰀠trailing󰀠edge󰀠of󰀠the󰀠common󰀠mode󰀠pulse󰀠signal,󰀠VCM,󰀠to󰀠assure󰀠that󰀠the󰀠output󰀠will󰀠remain󰀠in󰀠a󰀠Logic󰀠Low󰀠state󰀠(i.e.,󰀠VO󰀠<󰀠1.0󰀠V).9.󰀠󰀠The󰀠1.9󰀠kΩ󰀠load󰀠represents󰀠1󰀠TTL󰀠unit󰀠load󰀠of󰀠1.6󰀠mA󰀠and󰀠the󰀠5.6󰀠kΩ󰀠pull-up󰀠resistor.10.󰀠󰀠The󰀠RL󰀠=󰀠20󰀠kΩ,󰀠CL󰀠=󰀠100󰀠pF󰀠load󰀠represents󰀠an󰀠IPM󰀠(Intelligent󰀠Power󰀠Module)󰀠load.11.󰀠󰀠See󰀠Option󰀠020󰀠data󰀠sheet󰀠for󰀠more󰀠information.

12.󰀠󰀠Use󰀠of󰀠a󰀠0.1󰀠µF󰀠bypass󰀠capacitor󰀠connected󰀠between󰀠Pins󰀠5󰀠and󰀠8󰀠is󰀠recommended.

13.󰀠󰀠In󰀠accordance󰀠with󰀠UL󰀠1577,󰀠each󰀠optocoupler󰀠is󰀠proof󰀠tested󰀠by󰀠applying󰀠an󰀠insulation󰀠test󰀠voltage󰀠≥4500󰀠V󰀠rms󰀠for󰀠1󰀠second󰀠(leakage󰀠detection󰀠current󰀠limit,󰀠Ii-o󰀠≤5󰀠µA).

14.󰀠󰀠In󰀠accordance󰀠with󰀠UL󰀠1577,󰀠each󰀠optocoupler󰀠is󰀠proof󰀠tested󰀠by󰀠applying󰀠an󰀠insulation󰀠test󰀠voltage󰀠≥4500󰀠V󰀠rms󰀠for󰀠1󰀠second󰀠(leakage󰀠detection󰀠current󰀠limit,󰀠Ii-o󰀠≤󰀠5󰀠µA).

15.󰀠󰀠In󰀠accordance󰀠with󰀠UL󰀠1577,󰀠each󰀠optocoupler󰀠is󰀠proof󰀠tested󰀠by󰀠applying󰀠an󰀠insulation󰀠test󰀠voltage󰀠≥6000󰀠V󰀠rms󰀠for󰀠1󰀠second󰀠(leakage󰀠detection󰀠current󰀠limit,󰀠Ii-o󰀠≤5󰀠µA).

16.󰀠󰀠This󰀠test󰀠is󰀠performed󰀠before󰀠the󰀠100%󰀠Production󰀠test󰀠shown󰀠in󰀠the󰀠VDE󰀠0884󰀠Insulation󰀠Related󰀠Characteristics󰀠Table,󰀠if󰀠applicable.

17.󰀠󰀠The󰀠difference󰀠between󰀠tPLH󰀠and󰀠tPHL󰀠between󰀠any󰀠two󰀠devices󰀠(same󰀠part󰀠number)󰀠under󰀠the󰀠same󰀠test󰀠condition.󰀠(See󰀠Power󰀠Inverter󰀠Dead󰀠Time󰀠and󰀠Propagation󰀠Delay󰀠Specifications󰀠section.)

13

HCPL-4504/045410T = 25°C40 mAV = 5.0 VACCA35 mAm – T30 mANERR25 mAUC5 T20 mAUPT15 mAUO –10 mA OII = 5 mA0F01020VO – OUTPUT VOLTAGE – VFigure 1. DC and pulsed transfer characteristics.

OIHCPL-4504/0454TA1.5R REFSNAR1.0T TNERRUC0.5NORMALIZED DIEZVF = 16 mAIO = 0.4 VLAVCC = 5.0 VMRTO0.0A = 25°CN02468101214161820222426 IF – INPUT CURRENT – mAFigure 2. Current transfer ratio vs. input current.

HCPL-4504 fig 2a HCPL-4504/04541000Am –100 T IFNT = 25°CAER10RV+U–FC D1.0RAW0.1ROF –0.01 FI0.0011.11.21.31.41.51.6VF – FORWARD VOLTAGE – VOLTSFigure 3. Input current vs. forward voltage.

14

25HCPL-J454TA = 25° CAVmCC = 5.0 V40 mA 20–35 mA TN30 mAERR1525 mAU20 mAC TU1015 mAPTU10 mAO –5 OIF = 5 mAI005101520VO – OUTPUT VOLTAGE – VHCPL-4504 fig 1bOITA2.0HCPL-J454RNORMALIZED RIEF = 16 mAFSN1.5VO = 0.4 VVACC = 5.0 VRTA = 25° CT TNE1.0RRUC DE0.5ZILAMRO0N0510152025IF – INPUT CURRENT – mAHCPL-4504 fig 2bHCPL-J454/HCNW45041000AT = 25°CmA –100 T IFNER10RV+U–FC D1.0RAW0.1ROF –0.01 FI0.0011.21.31.41.51.61.7VF – FORWARD VOLTAGE – VOLTSHCNW450420T = 25°CV = 5.0 VACCAm18 1640 mA– T35 mANE1430 mARR1225 mAUC1020 mA TU8P15 mATU6O10 mA –4 OI = 5 mAI2F001020VO – OUTPUT VOLTAGE – VHCPL-4504 fig 1cOIHCNW4504TAR R2.0NORMALIZEDIEFVF = 16 mAO = 0.4 VSNA1.6VCC = 5.0 VRTA = 25°CT TN1.2ERRUC0.8 DEZIL0.4AMRO0N0510152025 IF – INPUT CURRENT – mAHCPL-4504 fig 2cNORMALIZED CURRENT TRANSFER RATIONORMALIZED CURRENT TRANSFER RATIO1.11.00.90.80.71.05NORMALIZED CURRENT TRANSFER RATIOHCPL-4504/0454HCPL-J454NORMALIZEDIF = 16 mAVO = 0.4 VVCC = 5.0 VTA = 25° C1.05HCNW4504NORMALIZEDIF = 16 mAVO = 0.4 VVCC = 5.0 VTA = 25°C1.01.0NORMALIZEDIF = 16 mAVO = 0.4 VVCC = 5.0 VTA = 25°C0.950.950.90.90.6-60-40-200204060801001200.85-60-40-200204060801000.85-60-40-20020406080100120 TA – TEMPERATURE – °CTA – TEMPERATURE – °C TA – TEMPERATURE – °CFigure 4. Current transfer ratio vs. temperature.

IOH – LOGIC HIGH OUTPUT CURRENT – nA10410310210110010-110-2-60-40-20HCPL-4504 fig 4bHCPL-4504 fig 4a IF = 0 mAVO = VCC = 5.0 VHCPL-4504 fig 4c020406080100120 TA – TEMPERATURE – °CFigure 5. Logic high output current vs. temperature.

IF0VOVTHHLHCPL-4504 fig 5 VCCVTHLHVOLPULSEGEN.Z = 50ΩOt = 5 nsrIF1238760.1µF5RLVCC

VO

I MONITORF

RM4C LtPHLtPLHFigure 6. Switching test circuit.

VCM0 Vtr10%1234VFFVOLVCM+–PULSE GEN.8760.1µF5CLRLVOVCC

90%90%10%tfABVCCIFVOSWITCH AT A: I = 0 mAFVOSWITCH AT B: I = 12 mA, 16 mAF

Figure 7. Test circuit for transient immunity and typical waveforms.15

0.50tp – PROPAGATION DELAY – µs HCPL-4504/0454tp – PROPAGATION DELAY – µstPLHtPLHtp – PROPAGATION DELAY – µsVCC = 5.0 V0.45RL = 1.9 kΩCL = 15 pF0.40VTHHL = VTHLH = 1.5 V10% DUTY CYCLE0.35tPHL0.300.250.200.150.10-60-40-200IF = 10 mAIF = 16 mA0.50 HCPL-J454/HCNW4504VCC = 5.0 V0.45RL = 1.9 kΩCL = 15 pF0.40VTHHL = VTHLH = 1.5 V10% DUTY CYCLE0.350.300.250.200.150.10-60-40-200IF = 10 mAIF = 16 mAtPHL1.4VCC = 5.0 V1.2TA = 25° CCL = 15 pF1.0VTHHL = VTHLH = 1.5 V10% DUTY CYCLE0.80.60.40.20.00246IF = 10 mA tPHL I = 16 mAFtPLH20406080100120204060801001208101214161820 TA – TEMPERATURE – °C TA – TEMPERATURE – °C RL – LOAD RESISTANCE – kΩFigure 8. Propagation delay time vs. temperature.

HCPL-4504 fig 8a HCPL-4504 fig 8b1.1 HCPL-4504/0454Figure 9. Propagation delay time vs. load resis-tance.

HCPL-4504 fig 9 HCPL-J454/HCNW45042.62.42.22.01.81.61.41.21.00.80.60.40.20.0tp – PROPAGATION DELAY – µstp – PROPAGATION DELAY – µstp – PROPAGATION DELAY – µsVCC = 5.0 VTA = 25° CCL = 100 pFVTHHL = 1.5 VVTHLH = 2.0 V50% DUTY CYCLEtPLHIF = 10 mAIF = 16 mAVCC = 15.0 V1.0RL = 20 kΩCL = 100 pF0.9VTHHL = 1.5 V VTHLH = 2.0 V0.850% DUTY CYCLE0.70.60.50.4tPHLIF = 10 mAIF = 16 mAtPLH1.1VCC = 15.0 V1.0RL = 20 kΩCL = 100 pF0.9VTHHL = 1.5 V VTHLH = 2.0 V0.850% DUTY CYCLE0.70.60.50.4tPHLIF = 10 mAIF = 16 mAtPLHtPHL024681012141618200.3-60-40-200204060801001200.3-60-40-20020406080100120 RL– LOAD RESISTANCE – kΩ TA – TEMPERATURE – °C TA – TEMPERATURE – °CFigure 10. Propagation delay time vs. load resistance.

HCPL-4504 fig 10 Figure 11. Propagation delay time vs. temperature.

HCPL-4504 fig 11a HCPL-4504 fig 11b 1.8tp – PROPAGATION DELAY – µstp – PROPAGATION DELAY – µstp – PROPAGATION DELAY – µsVCC = 15.0 V1.6TA = 25° C = 100 pF1.4CLVTHHL = 1.5 V1.2VTHLH = 2.0 V50% DUTY CYCLE1.00.80.60.40.20.00IF = 10 mAIF = 16 mAtPHL3.5tPLHVCC = 15.0 V3.0TA = 25° CRL = 20 kΩVTHHL = 1.5 V2.5VTHLH = 2.0 V2.050% DUTY CYCLE1.51.00.50.01.2tPLH1.11.00.90.80.70.60.50.40.3tPHLtPLHTA = 25° CRL = 20 kΩCL = 100 pFVTHHL = 1.5 VVTHLH = 2.0 V50% DUTY CYCLEtPHLIF = 10 mAIF = 16 mA010020030040050060070080090010005101520253035404550 RL – LOAD RESISTANCE – kΩ0.21011121314151617181920 VCC – SUPPLY VOLTAGE – VIF = 10 mAIF = 16 mA CL – LOAD CAPACITANCE – pFFigure 12. Propagation delay time vs. load resistance.

HCPL-4504 fig 12 Figure 13. Propagation delay time vs. load capacitance.

HCPL-4504 fig 13Figure 14. Propagation delay time vs. supply voltage.

HCPL-4504 fig 14 16

OUTPUT POWER – PS, INPUT CURRENT – ISOUTPUT POWER – PS, INPUT CURRENT – IS800700600500400300(230)20010000HCPL-4504 OPTION 060/HCPL-J454PS (mW)IS (mA) for HCPL-4504 OPTION 060IS (mA) for HCPL-J4541000900800700600500400300200(150)1000HCPL-0454 OPTION 060/HCNW4504PS (mW) for HCNW4504IS (mA) for HCNW4504PS (mW) for HCPL-0454OPTION 060IS (mA) for HCPL-0454OPTION 0602550751001251501752000255075100125150175TS – CASE TEMPERATURE – °CTS – CASE TEMPERATURE – °CFigure 15. Thermal derating curve, dependence of safety limiting valve with case temperature per IEC/EN/DIN EN 60747-5-2.

HCPL-4504 fig 15b+HVHCPL-4504/0454/J4548HCNW4504LED 127635OUT 1BASE/GATEDRIVE CIRCUITQ1++HCPL-4504/0454/J4548HCNW4504LED 227635OUT 2BASE/GATEDRIVE CIRCUITQ2–HVFigure 16. Typical power inverter.

HCPL-4504 fig 1617

Figure 17. LED delay and dead time diagram.

Power Inverter Dead Time and Propagation Delay Specifica-tions

The󰀠HCPL-4504/0454/J454󰀠and󰀠HCNW4504󰀠include󰀠a󰀠specification󰀠intended󰀠to󰀠help󰀠designers󰀠minimize󰀠“dead󰀠time”󰀠in󰀠their󰀠power󰀠inverter󰀠designs.󰀠The󰀠new󰀠“propaga-tion󰀠delay󰀠difference”󰀠specification󰀠(tPLH󰀠-󰀠tPHL)󰀠is󰀠useful󰀠for󰀠determining󰀠not󰀠only󰀠how󰀠much󰀠optocoupler󰀠switch-ing󰀠delay󰀠is󰀠needed󰀠to󰀠prevent󰀠“shoot-through”󰀠current,󰀠but󰀠also󰀠for󰀠determining󰀠the󰀠best󰀠achievable󰀠worst-case󰀠dead󰀠time󰀠for󰀠a󰀠given󰀠design.

When󰀠inverter󰀠power󰀠transistors󰀠switch󰀠(Q1󰀠and󰀠Q2󰀠in󰀠Figure󰀠17),󰀠it󰀠is󰀠essential󰀠that󰀠they󰀠never󰀠conduct󰀠at󰀠the󰀠same󰀠time.󰀠Extremely󰀠large󰀠currents󰀠will󰀠flow󰀠if󰀠there󰀠is󰀠any󰀠overlap󰀠in󰀠their󰀠conduction󰀠during󰀠switching󰀠tran-sitions,󰀠potentially󰀠damaging󰀠the󰀠transistors󰀠and󰀠even󰀠the󰀠surrounding󰀠circuitry.󰀠This󰀠“shoot-through”󰀠current󰀠is󰀠eliminated󰀠by󰀠delaying󰀠the󰀠turn-on󰀠of󰀠one󰀠transistor󰀠(Q2)󰀠long󰀠enough󰀠to󰀠ensure󰀠that󰀠the󰀠opposing󰀠transistor󰀠(Q1)󰀠has󰀠completely󰀠turned󰀠off.󰀠This󰀠delay󰀠introduces󰀠a󰀠small󰀠amount󰀠of󰀠“dead󰀠time”󰀠at󰀠the󰀠output󰀠of󰀠the󰀠inverter󰀠dur-ing󰀠which󰀠both󰀠transistors󰀠are󰀠off󰀠during󰀠switching󰀠tran-sitions.󰀠Minimizing󰀠this󰀠dead󰀠time󰀠is󰀠an󰀠important󰀠design󰀠goal󰀠for󰀠an󰀠inverter󰀠designer.

The󰀠amount󰀠of󰀠turn-on󰀠delay󰀠needed󰀠depends󰀠on󰀠the󰀠propagation󰀠delay󰀠characteristics󰀠of󰀠the󰀠optocoupler,󰀠as󰀠well󰀠as󰀠the󰀠characteristics󰀠of󰀠the󰀠transistor󰀠base/gate󰀠drive󰀠circuit.󰀠Considering󰀠only󰀠the󰀠delay󰀠characteristics󰀠of󰀠the󰀠optocoupler󰀠(the󰀠characteristics󰀠of󰀠the󰀠base/gate󰀠drive󰀠circuit󰀠can󰀠be󰀠analyzed󰀠in󰀠the󰀠same󰀠way),󰀠it󰀠is󰀠important󰀠to󰀠know󰀠the󰀠minimum󰀠and󰀠maximum󰀠turn-on󰀠(tPHL)󰀠and󰀠turnoff󰀠(tPLH)󰀠propagation󰀠delay󰀠specifications,󰀠prefer-ably󰀠over󰀠the󰀠desired󰀠operating󰀠temperature󰀠range.󰀠The󰀠importance󰀠of󰀠these󰀠specifications󰀠is󰀠illustrated󰀠in󰀠Figure󰀠17.󰀠The󰀠waveforms󰀠labeled󰀠“LED1”,󰀠“LED2”,󰀠“OUT1”,󰀠and󰀠“OUT2”󰀠are󰀠the󰀠input󰀠and󰀠output󰀠voltages󰀠of󰀠the󰀠opto-coupler󰀠circuits󰀠driving󰀠Q1󰀠and󰀠Q2󰀠respectively.󰀠Most󰀠in-verters󰀠are󰀠designed󰀠such󰀠that󰀠the󰀠power󰀠transistor󰀠turns󰀠on󰀠when󰀠the󰀠optocoupler󰀠LED󰀠turns󰀠on;󰀠this󰀠ensures󰀠that󰀠both󰀠power󰀠transistors󰀠will󰀠be󰀠off󰀠in󰀠the󰀠event󰀠of󰀠a󰀠power󰀠loss󰀠in󰀠the󰀠control󰀠circuit.󰀠Inverters󰀠can󰀠also󰀠be󰀠designed󰀠such󰀠that󰀠the󰀠power󰀠transistor󰀠turns󰀠off󰀠when󰀠the󰀠opto-coupler󰀠LED󰀠turns󰀠on;󰀠this󰀠type󰀠of󰀠design,󰀠however,󰀠re-quires󰀠additional󰀠fail-safe󰀠circuitry󰀠to󰀠turn󰀠off󰀠the󰀠power󰀠transistor󰀠if󰀠an󰀠over-current󰀠condition󰀠is󰀠detected.󰀠The󰀠timing󰀠illustrated󰀠in󰀠Figure󰀠17󰀠assumes󰀠that󰀠the󰀠power󰀠transistor󰀠turns󰀠on󰀠when󰀠the󰀠optocoupler󰀠LED󰀠turns󰀠on.

18

The󰀠LED󰀠signal󰀠to󰀠turn󰀠on󰀠Q2󰀠should󰀠be󰀠delayed󰀠enough󰀠so󰀠that󰀠an󰀠optocoupler󰀠with󰀠the󰀠very󰀠fastest󰀠turn-on󰀠propagation󰀠delay󰀠(tPHLmin)󰀠will󰀠never󰀠turn󰀠on󰀠before󰀠an󰀠optocoupler󰀠with󰀠the󰀠very󰀠slowest󰀠turn-off󰀠propagation󰀠delay󰀠(tPLHmax)󰀠turns󰀠off.󰀠To󰀠ensure󰀠this,󰀠the󰀠turn-on󰀠of󰀠the󰀠optocoupler󰀠should󰀠be󰀠delayed󰀠by󰀠an󰀠amount󰀠no󰀠less󰀠than󰀠(tPLHmax󰀠-󰀠tPHLmin),󰀠which󰀠also󰀠happens󰀠to󰀠be󰀠the󰀠max-imum󰀠data󰀠sheet󰀠value󰀠for󰀠the󰀠propagation󰀠delay󰀠differ-ence󰀠specification,󰀠(tPLH󰀠-󰀠tPHL).󰀠The󰀠HCPL-4504/0454/J454󰀠and󰀠HCNW4504󰀠specify󰀠a󰀠maximum󰀠(tPLH󰀠-󰀠tPHL)󰀠of󰀠1.3󰀠µs󰀠over󰀠an󰀠operating󰀠temperature󰀠range󰀠of󰀠0-70°C.Although󰀠(tPLH-tPHL)max󰀠tells󰀠the󰀠designer󰀠how󰀠much󰀠delay󰀠is󰀠needed󰀠to󰀠prevent󰀠shoot-through󰀠current,󰀠it󰀠is󰀠insuffi-cient󰀠to󰀠tell󰀠the󰀠designer󰀠how󰀠much󰀠dead󰀠time󰀠a󰀠design󰀠will󰀠have.󰀠Assuming󰀠that󰀠the󰀠optocoupler󰀠turn-on󰀠delay󰀠is󰀠exactly󰀠equal󰀠to󰀠(tPLH󰀠-󰀠tPHL)max,󰀠the󰀠minimum󰀠dead󰀠time󰀠is󰀠zero󰀠(i.e.,󰀠there󰀠is󰀠zero󰀠time󰀠between󰀠the󰀠turnoff󰀠of󰀠the󰀠very󰀠slowest󰀠optocoupler󰀠and󰀠the󰀠turn-on󰀠of󰀠the󰀠very󰀠fastest󰀠optocoupler).

Calculating󰀠the󰀠maximum󰀠dead󰀠time󰀠is󰀠slightly󰀠more󰀠complicated.󰀠Assuming󰀠that󰀠the󰀠LED󰀠turn-on󰀠delay󰀠is󰀠still󰀠exactly󰀠equal󰀠to󰀠(tPLH󰀠-󰀠tPHL)max,󰀠it󰀠can󰀠be󰀠seen󰀠in󰀠Figure󰀠17󰀠that󰀠the󰀠maximum󰀠dead󰀠time󰀠is󰀠the󰀠sum󰀠of󰀠the󰀠maximum󰀠difference󰀠in󰀠turn-on󰀠delay󰀠plus󰀠the󰀠maximum󰀠difference󰀠in󰀠turnoff󰀠delay,

[(tPLHmax-tPLHmin)+(tPHLmax-tPHLmin)].

This󰀠expression󰀠can󰀠be󰀠rearranged󰀠to󰀠obtain󰀠[(tPLHmax-tPHLmin)-(tPHLmin-tPHLmax)],and󰀠further󰀠rearranged󰀠to󰀠obtain[(tPLH-tPHL)max-(tPLH-tPHL)min],

which󰀠is󰀠the󰀠maximum󰀠minus󰀠the󰀠minimum󰀠data󰀠sheet󰀠values󰀠of󰀠(tPLH-tPHL).󰀠The󰀠difference󰀠between󰀠the󰀠maxi-mum󰀠and󰀠minimum󰀠values󰀠depends󰀠directly󰀠on󰀠the󰀠total󰀠spread󰀠in󰀠propagation󰀠delays󰀠and󰀠sets󰀠the󰀠limit󰀠on󰀠how󰀠good󰀠the󰀠worst-case󰀠dead󰀠time󰀠can󰀠be󰀠for󰀠a󰀠given󰀠design.󰀠Therefore,󰀠optocouplers󰀠with󰀠tight󰀠propagation󰀠delay󰀠specifications󰀠(and󰀠not󰀠just󰀠shorter󰀠delays󰀠or󰀠lower󰀠pulse-width󰀠distortion)󰀠can󰀠achieve󰀠short󰀠dead󰀠times󰀠in󰀠power󰀠inverters.󰀠The󰀠HCPL-4504/0454/J454󰀠and󰀠HCNW4504󰀠specify󰀠a󰀠minimum󰀠(tPLH󰀠-󰀠tPHL)󰀠of󰀠-0.7󰀠µs󰀠over󰀠an󰀠operat-ing󰀠temperature󰀠range󰀠of󰀠0-70°C,󰀠resulting󰀠in󰀠a󰀠maximum󰀠dead󰀠time󰀠of󰀠2.0󰀠µs󰀠when󰀠the󰀠LED󰀠turn-on󰀠delay󰀠is󰀠equal󰀠to󰀠(tPLH-tPHL)max,󰀠or󰀠1.3󰀠µs.

It󰀠is󰀠important󰀠to󰀠maintain󰀠accurate󰀠LED󰀠turn-on󰀠delays󰀠because󰀠delays󰀠shorter󰀠than󰀠(tPLH󰀠-󰀠tPHL)max󰀠may󰀠allow󰀠shoot-through󰀠currents,󰀠while󰀠longer󰀠delays󰀠will󰀠increase󰀠the󰀠worst-case󰀠dead󰀠time.

For product information and a complete list of distributors, please go to our website: www.avagotech.comAvago, Avago Technologies, and the A logo are trademarks of Avago Technologies Limited in the United States and other countries.Data subject to change. Copyright © 2005-2008 Avago Technologies Limited. All rights reserved. Obsoletes AV01-0552ENAV02-0867EN - June 20, 2008

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