专利名称：METHOD FOR FORMING A GATE
ELECTRODE HAVING A METAL
发明人：ADETUTU, Olubunmi O.,MICHAELSON, Lynne
M.,YU, Kathleen C.,JONES JR., Robert E.
申请号：EP05728396.2申请日：20050322公开号：EP1776715A1公开日：20070425
摘要：One embodiment forms a gate dielectric layer (18) over a substrate (10) andthen selectively deposits a first metal layer (26) over portions of the gate dielectric layer(18) in which a first device type will be formed. A second metal layer (28), different fromthe first metal layer (26), is formed over exposed portions of the gate dielectric layer (18)in which a second device type will be formed. Each of the first and second device typeswill have different work functions because each will include a different metal in directcontact with the gate dielectric. In one embodiment, the selective deposition of the firstmetal layer (26) is performed by ALD and with the use of an inhibitor layer (24) which isselectively formed over the gate dielectric layer (18) such that the first metal layer (26)may be selectively deposited on only those portions of the gate dielectric layer (18)which are not covered by the inhibitor layer (24).
申请人：Freescale Semiconductor, Inc.
地址：6501 William Cannon Drive West Austin, Texas 78735 US
国籍：US
代理机构：Wharmby, Martin Angus
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