Input Voltage: 1.1V~5.5V
Internal MOSFET with high switch current up to
3A
Description
The G1210 is a compact, high efficiency, and low voltage step-up DC/DC converter including an error amplifier, ramp generator, comparator, switch pass element and driver in which providing a stable and high efficient operation over a wide range of load currents. It operates in stable waveforms without external compensation.
The low start-up input voltage below 1.1V. The high switching rate minimized the size of external components. Besides, the 25µA low quiescent current together with high efficiency maintains long battery lifetime.
The output voltage is set with two external resistors.
25µA Quiescent (Switch-off) Supply Current Shutdown Mode Supply Current: <5µA 90% Efficiency
Up to 450KHz Switching Frequency Using Internal Power Switches SOT-23-6 Package
Applications
PDA DSC LCD Panel RF-Tags MP3
Portable Instrument Wireless Equipment
Ordering Information
G1210
1
Typical Application
G1210
Figure 1 (1.1V Stat-up input Voltage)
L14.7UHBat+D1SS24OUT 5.1VDC
VDDC2104C110UF5R3100K2SWC3104R11MC5 47UF/16VC647UF/16V6ENU1G1210C4105FB4GND13 C4104R2300KGNDTestCircuit
Figure.2 （1.1V Stat-up input Voltage）
2
G1210
Absolute Maximum Ratings
Supply Voltage…………………………………………………………………….…−0.3V to 6V SW Pin Switch Voltage……………………………………………………………………−0.3V to 6V Other I/O Pin Voltages……………………………………………………………−0.3V to 6V SW Pin Switch Current ……………………………………………………………...………………..3A Operating Junction Temperature…………………………………………………….……………..125°C Storage Temperature Range ……………………………………………….−65°C ~ +150°C
Pin Assignment
6
5
4
PIN NUMBER SOT23-6 1/3 2 4
PIN NAME GND SW FB VDD EN
FUNCTION Ground Switch Output Feedback Output
ON/OFF Control(High Enable)
1 2 3 5 6
3
G1210
Electrical Characteristics
(VIN = 1.5V, VDD set to 3.3V, Load Current = 0A, TA = 25°C, unless otherwise specified)
Parameter
Start-UP Voltage Operating VDD Range No Load Current I (VIN) Feedback Reference Voltage Switching Frequency Maximum Duty SW ON Resistance Current Limit Setting Line Regulation Load Regulation En Input High En Input Low
Temperature Stability for VOUT Thermal Shutdown
Thermal Shutdown Hysterics Maximum VRM
Test Conditions
IL = 1mA VDD pin voltage VIN = 1.5V, VOUT = 3.3V Close Loop, VDD = 3.3V VDD = 3.3V VDD = 3.3V VDD = 3.3V VDD = 3.3V
VIN = 1.5 ~ 2.5V, IL = 100mA VIN = 2.5V, IL = 1 ~ 300mA
Min 1.00 1.0 1.15 1
Typ 75 1.18 300 80 0.07 3 25 0.05 50 165 10 145
Max 5.5 1.22 0.6
Units V V
µA V KHz %
Ω A mV/V mV/mA V V ppm/℃
℃ ℃ mV
4
G1210
Pin Information
GND (Pin 1/3): Signal and Power Ground. Provide a short direct PCB path between GND and the (–) side of
the output capacitor(s).
SW (Pin 2): Switch Pin. Connect inductor between SW and VIN. Keep these PCB trace lengths as short and
wide as possible to reduce EMI and voltage overshoot.
FB (Pin 4): Feedback Input to the gm Error Amplifier. Connect resistor divider tap to this pin. The output
voltage can be adjusted from 3.3V to 20V by: VOUT = 1.18V • [1 + (R1/R2)]
VDD (Pin 5): Input positive power pin.
EN (Pin 6): En Control Input. Forcing this pin above 1V enables the part. Forcing this pin below 0.6V shuts
down the device. In shutdown, all functions are disabled, drawing <1µA supply current. Do not leave EN floating.
5
G1210
Application Information
For applications without standby or suspend modes, lower values of R1 and R2 are preferred.
Referring to Typical Application Circuits, the output For applications concerning the current consumption voltage of the switching regulator (VOUT) can be set in standby or suspend modes, the higher values of with Equation (1). R1 and R2 are needed. Such high impedance feedback loop is sensitive to any interference ,which
requires careful PCB layout
and avoid any interference, especially to FB pin. To
improve the system stability, a proper value
capacitor between FB pin and GND pin is suggested.
An empirical suggestion is around 20pF.
Current-limiting Resistance Setting
Output Voltage Setting
PCB Layout Guide
Feedback Loop Design
Referring to the Typical Application Circuits. The selection of R1 and R2 based on the trade-off between quiescent current consumption and interference immunity is stated below:
l Follow Equation (1)
l Higher R reduces the quiescent current (Path
current = 1.212V/R2), however resistors beyond 5MW are not Recommended.
PCB Layout shall follow these guidelines for better system stability:
A full GND plane without any gap break.
VDD to GND bypass Cap – The 1µF MLCC
noise bypass Cap pin 4 shall have short and wide connections.
VIN to GND bypass Cap – Add a Cap close to
the inductor when VIN is not an idea voltage source.
Minimize the FB node copper area and keep it
far away from noise sources.
6
Packaging Information
G1210
SOT-23-6 Package Outline Dimension
Symbol A A1 A2 b c D E E1 e e1 L
1.800 0.300 0°
Dimensions In Millimeters Min Max 1.050 0.000 1.050 0.300 0.100 2.820 1.500 2.650
0.950(BSC)
2.000 0.600 8°
0.071 0.012 0°
1.250 0.100 1.150 0.500 0.200 3.020 1.700 2.950
Dimensions In Inches
Min Max 0.041 0.000 0.041 0.012 0.004 0.111 0.059 0.104
0.049 0.004 0.045 0.020 0.008 0.119 0.067 0.116
0.037(BSC)
0.079 0.024 8°
θ
7
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