专利名称:Logic multiprocessor for FPGA
implementation
发明人:Michael R. Butts申请号:US10669095申请日:20030923公开号:US07260794B2公开日:20070821
专利附图:
摘要:A design verification system utilizing programmable logic devices having varyingnumbers of logic processors, macro processors, memory processors and generalpurpose processors programmed therein is disclosed. These various processors can
execute Boolean functions, macro operations, memory operations, and other computerinstructions. This avoids either the need to implement logic or the need to compile thedesign into many gate-level Boolean logic operations for logic processors. Improvedefficiency in the form of lower cost, lower power and/or higher speeds are the resultwhen verifying certain types of designs.
申请人:Michael R. Butts
地址:Portland OR US
国籍:US
代理机构:Orrick, Herrington & Sutcliffe LLP
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